CDF数据采集系统在1992年运行中的表现

K. Biery, K. Ragan, R. Grindley, A. Holscher, P. Sinervo, R. Harris, K. Schurecht, T. Shaw
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引用次数: 0

摘要

CDF数据采集系统在1992年进行了升级,对前端电子设备进行了修改,并增加了第二个基于fastbus的事件构建器。目标是向3级触发处理器群提供35 hz的输出速率。系统的初始性能直到3级输入进行审查,并与Verilog模拟的性能进行比较。该系统运行可靠,性能与行为仿真的预测结果吻合较好。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance of the CDF DAQ system in the 1992 run
The CDF data acquisition system was upgraded for the 1992 run, with modifications to the front-end electronics and the addition of a second FASTBUS-based event builder. The goal is a 35-Hz output rate to the Level 3 trigger processor farm. The initial performance of the system up to the Level 3 input is reviewed and compared to that of a Verilog simulation. The system runs reliably and its performance is in good agreement with the predictions of the behavioral simulation.<>
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