集成电路质量分级:SEMATECH数据的实验研究

A. Singh, D. Lakin, Gaurav Sinha, P. Nigh
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引用次数: 15

摘要

在半导体制造中,在晶圆上观察到的缺陷聚集通常导致从晶圆或晶圆的部分中丢弃显示高故障发生率的模具的做法。在最近的工作中,我们以最小化生产测试期间的测试逃逸为目标,对这个过程进行了形式化和细化。在新方法中,在评估特定模具的测试结果质量时,还考虑了模具相邻的测试结果。在其他结果中,已经表明,通过利用缺陷聚类信息,可以在测试后进行分组,以便分离出具有缺陷水平的高质量分组,其数量级优于该批次的平均值。在本文中,我们提出了第一个实验结果,对现代亚微米CMOS工艺的模具筛选的有效性。数据来自SEMATECH测试方法实验,IBM在0.5 /spl mu/m的生产ASIC上对18466进行了测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Binning for IC quality: experimental studies on the SEMATECH data
In semiconductor manufacturing, the observed clustering of defects on a wafer has often led to the practice of discarding die from wafers, or parts of the wafer, that display a high incidence of failures. In recent work we have formalized and refined this process with the goal of minimizing test escapes during production testing. In the new approach, in evaluating the quality of test results for a particular die, test results for the die's neighbors are also considered. Among other results, it has been shown that by exploiting defect clustering information it is possible to bin dice following testing so as to separate out a high quality bin with defect levels up to an order of magnitude better than the average for the lot. In this paper we present the first experimental results on the effectiveness of die screening for a modern submicron CMOS process. The data comes from the SEMATECH test methods experiment conducted at IBM on 18,466 from a production ASIC in a 0.5 /spl mu/m process.
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