基于180nm技术的低压浮栅MOSFET电流镜像电路的实现

2019 Third International Conference on Inventive Systems and Control (ICISC) Pub Date : 2019-01-01 DOI:10.1109/ICISC44355.2019.9036355

Ansuman Mishra, M. Bhat, Prasad Krishna Pai, D. Kamath

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引用次数: 3

摘要

本文讨论了利用浮栅MOSFET器件实现低压基流镜(CM)和级联电流镜(CCM)电路。比较了基本CM和双CCM电路的输出电阻、最小输出电压要求和功耗等性能参数。目前的镜像电路使用Cadence Virtuoso实现180纳米技术，并使用Spectre RF进行模拟。仿真结果与理论吻合较好。与栅极驱动电流镜像电路相比，基于FGMOS的基本CM和双CCM电路的功耗分别降低了52.4%和40%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Implementation of Low Voltage Floating Gate MOSFET based Current Mirror Circuits using 180nm technology

The paper discusses implementation of low voltage (LV) basic current mirror (CM) and cascode current mirror (CCM) circuits using Floating Gate MOSFET (FGMOS) devices. The performance parameters such as output resistance, minimum output voltage requirement and power dissipation are compared for basic CM and double CCM circuits. The current mirror circuits are implemented with 180 nm technology using Cadence Virtuoso and simulated with Spectre RF. The simulation results are in good agreement with theory. The FGMOS based basic CM and double CCM circuits exhibited 52.4% and 40% power reduction as compared to gate driven current mirror circuits.

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来源期刊

2019 Third International Conference on Inventive Systems and Control (ICISC)

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