Comparison between an ASK Event-Based Demodulation and a Digital IQ Demodulation

This paper presents a comparison between two ASK demodulation techniques. The first one is a digital implementation of a traditional IQ demodulation, while the second is a novel digital demodulation algorithm connected to an EB-ADC (Event-Based ADC) for minimizing the number of processed events. The EB-ADC has been designed using a reduced LCSS (Level Crossing Sample Scheme) with only 2 levels, connected to two strong-arm comparators for the digitalization process. Electrical simulations were used to characterize these comparators for integrating them in a full digital SystemVerilog (SV) simulation. An adaptation of python’s library has been modeled in SV for simulating the RF input signal and its amplitude noise. This implemented algorithm benefits from the measurement of the time elapsed between two adjacent events improving the demodulator performance and noise resiliency, reaching, for instance, a BER=$3.33\cdot 10^{-7}$ for a modulation index (MI) of 10%, a SNR of 16 dB and a bitrate of 6.78 Mbps. This proposal was recently sent to fabrication in FDSOI 28nm STMicroelectronics technology.