CMOS晶体管输出级的最佳选择

2013 13th International Symposium on Communications and Information Technologies (ISCIT) Pub Date : 2013-10-24 DOI:10.1109/ISCIT.2013.6645878

A. López-Martín, R. Carvajal, J. Ramírez-Angulo

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引用次数: 1

摘要

分析了存在非理想效应时CMOS晶体管输出级的最佳选择。结果表明，采用源耦合差分对的电流折叠方法优于基于电流反射镜的传统方法。采用上述两种方法的两种版本的CMOS晶体管已在0.5μm CMOS技术上制造并测试。测量结果证实了输出阶段电流折叠的线性改善。

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On the optimal choice of the output stage in CMOS transconductors

The optimal choice of output stages in CMOS transconductors in the presence of nonideal effects is analyzed. It is shown that current folding employing source-coupled differential pairs is advantageous versus the conventional approach based on current mirrors. Two versions of a CMOS transconductor, each one using one of the mentioned approaches, have been fabricated in a 0.5μm CMOS technology and tested. Measurement results confirm the linearity improvements of current folding at the output stage.

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2013 13th International Symposium on Communications and Information Technologies (ISCIT)

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