用于电缆调制解调器应用的3v 10b 100ms /s数模转换器

Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434) Pub Date : 2000-08-28 DOI:10.1109/APASIC.2000.896944

Jin Park, Seung-Chul Lee, Jin-Sik Yoon, Seunghoon Lee

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引用次数: 5

摘要

本文介绍了一种用于电缆调制解调器应用的10b100ms /s CMOS数模转换器(DAC)。差分开关的除毛刺电路和级联码电流源，从单元解码电流单元矩阵中分离出来，提高了动态性能。所提出的和传统的原型DAC是在0.35 /spl mu/m的CMOS工艺中制造的。所提出的DAC的测量微分和积分非线性分别显示在10b水平下/spl plusmn/0.17 LSB和/spl plusmn/0.43 LSB。在100 MS/s时，100 kHz输入信号的无杂散动态范围为66 dB, 10 MHz输入信号的无杂散动态范围为52 dB。

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A 3 V 10 b 100 MS/s digital-to-analog converter for cable modem applications

This paper describes a 10 b 100 MS/s CMOS digital-to-analog converter (DAC) for cable modem applications. Differential switches with the proposed deglitching circuit and the cascode current sources, separated from the unit decoded current cell matrix improve the dynamic performance. The proposed and conventional prototype DAC's are fabricated in a 0.35 /spl mu/m CMOS process. The measured differential and integral nonlinearities of the proposed DAC shows /spl plusmn/0.17 LSB and /spl plusmn/0.43 LSB at a 10b level, respectively. At 100 MS/s, the spurious-free dynamic range is 66 dB for a 100 kHz input signal and 52 dB for a 10 MHz input signal.

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Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)

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