{"title":"采用混合寄存器交换的软输出维特比解码器","authors":"D. M. Khatri, S. Haridas","doi":"10.1145/1980022.1980223","DOIUrl":null,"url":null,"abstract":"There are two types of decoding techniques, trace back method (TBM) and register exchange method (REM). In trace back method, memory requirement is high. TBM is the preferred method used in Viterbi decoders (VD) having large constraint length and high performance. However, the TBM has drawbacks, which requires last-in-first-out (LIFO) buffer and has to use multiple read operations for high speed operation. This multiple operation results in complex control logic In register exchange method, the no. of switching activities is high. So total power dissipation is high. Using Hybrid register exchange, no. of switching activities is reduced and so the total power dissipation is reduced. So we concentrate more on REM. There are two types of decision outputs, hard output and soft output. In hard decision output, error correcting capability is less as compared to soft output decision. So to increase the accuracy as compared with hard decision outputs, soft output viterbi algorithm is used.. In this paper, we propose a new approache hybrid register exchange method (HREM). The simulation model is ready. The main advantage of the proposed method is that it reduces the number of decoding operation and memory read operations, less switching activity and fewer requirements on additional control logic.","PeriodicalId":197580,"journal":{"name":"International Conference & Workshop on Emerging Trends in Technology","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Soft output Viterbi decoder using hybrid register exchange\",\"authors\":\"D. M. Khatri, S. Haridas\",\"doi\":\"10.1145/1980022.1980223\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"There are two types of decoding techniques, trace back method (TBM) and register exchange method (REM). In trace back method, memory requirement is high. TBM is the preferred method used in Viterbi decoders (VD) having large constraint length and high performance. However, the TBM has drawbacks, which requires last-in-first-out (LIFO) buffer and has to use multiple read operations for high speed operation. This multiple operation results in complex control logic In register exchange method, the no. of switching activities is high. So total power dissipation is high. Using Hybrid register exchange, no. of switching activities is reduced and so the total power dissipation is reduced. So we concentrate more on REM. There are two types of decision outputs, hard output and soft output. In hard decision output, error correcting capability is less as compared to soft output decision. So to increase the accuracy as compared with hard decision outputs, soft output viterbi algorithm is used.. In this paper, we propose a new approache hybrid register exchange method (HREM). The simulation model is ready. The main advantage of the proposed method is that it reduces the number of decoding operation and memory read operations, less switching activity and fewer requirements on additional control logic.\",\"PeriodicalId\":197580,\"journal\":{\"name\":\"International Conference & Workshop on Emerging Trends in Technology\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-02-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference & Workshop on Emerging Trends in Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1980022.1980223\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference & Workshop on Emerging Trends in Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1980022.1980223","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
译码技术有两种:回溯法(trace back method, TBM)和寄存器交换法(register exchange method, REM)。在回溯方法中,对内存的要求很高。TBM具有约束长度大、性能好等优点,是Viterbi译码器的首选方法。然而,TBM有缺点,它需要后进先出(LIFO)缓冲区,并且必须使用多个读取操作来实现高速操作。这种多重操作导致控制逻辑复杂,在寄存器交换方法中,没有。交换活动的比率很高。所以总功耗很高。使用混合寄存器交换,没有。减少了开关活动,从而降低了总功耗。因此,我们更加关注快速眼动的决策输出,它有两种类型:硬输出和软输出。在硬决策输出中,纠错能力较软决策差。因此,为了提高与硬决策输出相比的精度,采用了软输出viterbi算法。本文提出了一种新的混合寄存器交换方法(HREM)。仿真模型已经准备好。该方法的主要优点是减少了解码操作和存储器读取操作的数量,减少了切换活动,减少了对额外控制逻辑的要求。
Soft output Viterbi decoder using hybrid register exchange
There are two types of decoding techniques, trace back method (TBM) and register exchange method (REM). In trace back method, memory requirement is high. TBM is the preferred method used in Viterbi decoders (VD) having large constraint length and high performance. However, the TBM has drawbacks, which requires last-in-first-out (LIFO) buffer and has to use multiple read operations for high speed operation. This multiple operation results in complex control logic In register exchange method, the no. of switching activities is high. So total power dissipation is high. Using Hybrid register exchange, no. of switching activities is reduced and so the total power dissipation is reduced. So we concentrate more on REM. There are two types of decision outputs, hard output and soft output. In hard decision output, error correcting capability is less as compared to soft output decision. So to increase the accuracy as compared with hard decision outputs, soft output viterbi algorithm is used.. In this paper, we propose a new approache hybrid register exchange method (HREM). The simulation model is ready. The main advantage of the proposed method is that it reduces the number of decoding operation and memory read operations, less switching activity and fewer requirements on additional control logic.