{"title":"CMOS数字电路中静态功率和动态性能的权衡:大块与双栅SOI mosfet","authors":"M. Agostinelli, M. Alioto, D. Esseni, L. Selmi","doi":"10.1109/ESSDERC.2007.4430911","DOIUrl":null,"url":null,"abstract":"This paper investigates with a mixed device/circuit simulation methodology the effectiveness of DG SOI MOSFETs compared to conventional bulk MOSFETs for the implementation of low standby power circuit techniques. Our results indicate that DG MOSFETs offer significant advantages essentially because of the larger V T sensitivity to back-biasing.","PeriodicalId":103959,"journal":{"name":"ESSDERC 2007 - 37th European Solid State Device Research Conference","volume":"149 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Trading off static power and dynamic performance in CMOS digital circuits: bulk versus double gate SOI MOSFETs\",\"authors\":\"M. Agostinelli, M. Alioto, D. Esseni, L. Selmi\",\"doi\":\"10.1109/ESSDERC.2007.4430911\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates with a mixed device/circuit simulation methodology the effectiveness of DG SOI MOSFETs compared to conventional bulk MOSFETs for the implementation of low standby power circuit techniques. Our results indicate that DG MOSFETs offer significant advantages essentially because of the larger V T sensitivity to back-biasing.\",\"PeriodicalId\":103959,\"journal\":{\"name\":\"ESSDERC 2007 - 37th European Solid State Device Research Conference\",\"volume\":\"149 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSDERC 2007 - 37th European Solid State Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2007.4430911\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSDERC 2007 - 37th European Solid State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2007.4430911","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
摘要
本文采用混合器件/电路仿真方法研究了DG SOI mosfet与传统大块mosfet在实现低待机功率电路技术方面的有效性。我们的研究结果表明,DG mosfet具有显著的优势,主要是因为对反偏的较大V T灵敏度。
Trading off static power and dynamic performance in CMOS digital circuits: bulk versus double gate SOI MOSFETs
This paper investigates with a mixed device/circuit simulation methodology the effectiveness of DG SOI MOSFETs compared to conventional bulk MOSFETs for the implementation of low standby power circuit techniques. Our results indicate that DG MOSFETs offer significant advantages essentially because of the larger V T sensitivity to back-biasing.