{"title":"模拟和混合信号器件功能验证的联合仿真方法评估","authors":"Mathias Heitauer, M. Versen","doi":"10.31399/asm.edfa.2021-3.p008","DOIUrl":null,"url":null,"abstract":"\n This article presents an automation workflow for the development of analog and mixed-signal devices similar to the two-stage process used for the design and verification of logic ICs. The use of a co-simulation interface makes it possible to build and verify failure models.","PeriodicalId":431761,"journal":{"name":"EDFA Technical Articles","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Evaluation of a Co-Simulation Approach for Functional Verification of Analog and Mixed Signal Devices\",\"authors\":\"Mathias Heitauer, M. Versen\",\"doi\":\"10.31399/asm.edfa.2021-3.p008\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n This article presents an automation workflow for the development of analog and mixed-signal devices similar to the two-stage process used for the design and verification of logic ICs. The use of a co-simulation interface makes it possible to build and verify failure models.\",\"PeriodicalId\":431761,\"journal\":{\"name\":\"EDFA Technical Articles\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"EDFA Technical Articles\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.31399/asm.edfa.2021-3.p008\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"EDFA Technical Articles","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.31399/asm.edfa.2021-3.p008","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Evaluation of a Co-Simulation Approach for Functional Verification of Analog and Mixed Signal Devices
This article presents an automation workflow for the development of analog and mixed-signal devices similar to the two-stage process used for the design and verification of logic ICs. The use of a co-simulation interface makes it possible to build and verify failure models.
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