一种用于VLSI集成电路面积规划的平面图形矩形对偶算法

21st Design Automation Conference Proceedings Pub Date : 1984-06-25 DOI:10.1109/DAC.1984.1585872

K. Kozminski, E. Kinnen

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引用次数: 81

摘要

提出了一种求平面三角图矩形对偶的O(n /sup 2/)算法。在实践中，几乎可以观察到线性的运行时间。该算法可用于解决超大规模集成电路设计中的区域规划问题。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An Algorithm for Finding a Rectangular Dual of a Planar Graph for Use in Area Planning for VLSI Integrated Circuits

An O(n /sup 2/) algorithm for finding a rectangular dual of a planar triangulated graph is presented. In practice, almost linear running times have been observed. The algorithm is useful for solving area planning problems in VLSI IC design.

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21st Design Automation Conference Proceedings

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