Joshua M. Levine, Edward A. Stott, G. Constantinides, P. Cheung
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SMI: Slack Measurement Insertion for online timing monitoring in FPGAs
Shadow registers, driven by a variable-phase clock, can be used to extract useful timing information from a circuit during operation. This paper presents Slack Measurement Insertion (SMI), an automated tool flow for inserting shadow registers into an FPGA design to enable measurement of timing slack. The flow provides a parameterised level of circuit coverage and results in minimal timing and area overheads. We demonstrate the process through its application to three complex benchmark designs.