具有双频开关的DC-DC开关变换器的集成数字控制器

2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408) Pub Date : 2003-06-12 DOI:10.1109/VLSIC.2003.1221157

Martin Yeung-Kei Chui, W. Ki, C. Tsui

{"title":"具有双频开关的DC-DC开关变换器的集成数字控制器","authors":"Martin Yeung-Kei Chui, W. Ki, C. Tsui","doi":"10.1109/VLSIC.2003.1221157","DOIUrl":null,"url":null,"abstract":"A 0.6 /spl mu/m CMOS integrated digital PID controller for a buck converter is presented. It consists of: (1) a VCO driving a counter to serve as an ADC; (2) a PID compensator that employs variable integration times for enhancing accuracy and stability, and (3) a dual-band switching PWM generator with a modified tapped delay line for better output resolution and area efficiency. The converter switches at 1 MHz, while the tracking time is 50 /spl mu/s for a step change of 1 V.","PeriodicalId":270304,"journal":{"name":"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An integrated digital controller for DC-DC switching converter with dual-band switching\",\"authors\":\"Martin Yeung-Kei Chui, W. Ki, C. Tsui\",\"doi\":\"10.1109/VLSIC.2003.1221157\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 0.6 /spl mu/m CMOS integrated digital PID controller for a buck converter is presented. It consists of: (1) a VCO driving a counter to serve as an ADC; (2) a PID compensator that employs variable integration times for enhancing accuracy and stability, and (3) a dual-band switching PWM generator with a modified tapped delay line for better output resolution and area efficiency. The converter switches at 1 MHz, while the tracking time is 50 /spl mu/s for a step change of 1 V.\",\"PeriodicalId\":270304,\"journal\":{\"name\":\"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2003.1221157\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2003.1221157","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

介绍了一种用于降压变换器的0.6 /spl μ m CMOS集成数字PID控制器。它包括:(1)一个VCO驱动计数器作为ADC;(2)采用可变积分时间的PID补偿器，以提高精度和稳定性;(3)带有改进抽头延迟线的双频开关PWM发生器，以提高输出分辨率和面积效率。转换器的开关频率为1mhz，当阶跃变化为1v时，跟踪时间为50 /spl mu/s。

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An integrated digital controller for DC-DC switching converter with dual-band switching

A 0.6 /spl mu/m CMOS integrated digital PID controller for a buck converter is presented. It consists of: (1) a VCO driving a counter to serve as an ADC; (2) a PID compensator that employs variable integration times for enhancing accuracy and stability, and (3) a dual-band switching PWM generator with a modified tapped delay line for better output resolution and area efficiency. The converter switches at 1 MHz, while the tracking time is 50 /spl mu/s for a step change of 1 V.

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2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)

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