高效率DC-DC降压变换器,开关频率为60/120 mhz,输出电流为1a

M. Belloni, E. Bonizzoni, F. Maloberti
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引用次数: 13

摘要

该DC-DC降压变换器能够在高达120 MHz的开关频率下工作,75%占空比时的峰值功率效率为87%,60 MHz时的峰值功率效率为93%。本设计的主要特点是一种新的控制方法,取代了传统的基于运放的方案。所提出的电路使用电流模式控制和电压-脉冲转换器的PWM。该电路采用0.18µm CMOS技术制造,在300 mA时可达到20 mV/V的峰值负载调节和0.5 mV/V的线路调节。所使用的36nh电感和4.7µF电容适用于SiP实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High efficiency DC-DC buck converter with 60/120-MHz switching frequency and 1-A output current
This DC-DC buck converter is able to operate up to 120-MHz switching frequency with peak power efficiency of 87% for 75% duty cycle and 93% at 60 MHz. Key feature of this design is a new control method that replaces the conventional op-amp based scheme. The proposed circuit uses a current-mode control and a voltage-to-pulse converter for the PWM. The circuit, fabricated using a 0.18-µm CMOS technology, reaches a peak load regulation of 20 mV/V and line regulation of 0.5 mV/V at 300 mA. The used 36-nH inductance and 4.7-µF capacitor are suitable for SiP realizations.
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