Implementation of low power compressed ROM for direct digital frequency synthesizer

A Low Power Compressed ROM Look-up table has been presented in this paper to achieve low power consumption of the direct digital frequency synthesizer as well small core size. The quarter wave symmetry technique is used to store only one quarter of the sine wave. The suggested 12-bit compressed ROM designed consists of three 4-bit sub-ROMs based on an angular decomposition technique and trigonometric identity. Exploiting the advantages of sine-cosine symmetrical attributes together with XOR logic gates, one sub-ROM block can be removed from the design. These techniques, compressed the ROM into 368 bits. The ROM compressed ratio is 534.2:1, with only two adders, two multipliers, and XOR-gates with high frequency resolution of 0.029 Hz.