具有高质量超薄CVD ZrO/sub /栅极介质和自对准TaN和TaN/多晶硅栅极的MOS器件

2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184) Pub Date : 2001-06-12 DOI:10.1109/VLSIT.2001.934987

C. Lee, Y.H. Kim, H. Luan, S.J. Lee, T. Jeon, W. Bai, D. Kwong

{"title":"具有高质量超薄CVD ZrO/sub /栅极介质和自对准TaN和TaN/多晶硅栅极的MOS器件","authors":"C. Lee, Y.H. Kim, H. Luan, S.J. Lee, T. Jeon, W. Bai, D. Kwong","doi":"10.1109/VLSIT.2001.934987","DOIUrl":null,"url":null,"abstract":"In this paper, we have successfully fabricated and characterized self-aligned TaN and TaN/poly-Si gated n-MOSFETs with ultra thin (EOT=11 /spl Aring/) CVD ZrO/sub 2/ gate dielectrics. It is show that while both gate stacks show excellent leakage current and good thermal stability after a 900/spl deg/C, 30 s, N/sub 2/ anneal, the TaN/poly-Si ZrO/sub 2/ devices exhibit superior thermal stability even after 1000/spl deg/C, 30 s, N/sub 2/ anneal. In addition, the TaN/poly-Si devices show negligible frequency dependence of CV, charge trapping, and superior TDDB characteristics, compared to TaN devices. Well-behaved N-MOSFETs with both TaN and TaN/poly-Si gate electrodes are demonstrated.","PeriodicalId":232773,"journal":{"name":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"MOS devices with high quality ultra thin CVD ZrO/sub 2/ gate dielectrics and self-aligned TaN and TaN/poly-Si gate electrodes\",\"authors\":\"C. Lee, Y.H. Kim, H. Luan, S.J. Lee, T. Jeon, W. Bai, D. Kwong\",\"doi\":\"10.1109/VLSIT.2001.934987\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we have successfully fabricated and characterized self-aligned TaN and TaN/poly-Si gated n-MOSFETs with ultra thin (EOT=11 /spl Aring/) CVD ZrO/sub 2/ gate dielectrics. It is show that while both gate stacks show excellent leakage current and good thermal stability after a 900/spl deg/C, 30 s, N/sub 2/ anneal, the TaN/poly-Si ZrO/sub 2/ devices exhibit superior thermal stability even after 1000/spl deg/C, 30 s, N/sub 2/ anneal. In addition, the TaN/poly-Si devices show negligible frequency dependence of CV, charge trapping, and superior TDDB characteristics, compared to TaN devices. Well-behaved N-MOSFETs with both TaN and TaN/poly-Si gate electrodes are demonstrated.\",\"PeriodicalId\":232773,\"journal\":{\"name\":\"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2001.934987\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2001.934987","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 18

摘要

在本文中，我们成功地制备和表征了超薄(EOT=11 /spl /) CVD ZrO/sub /栅极介质的自对准TaN和TaN/多晶硅门控n- mosfet。结果表明，在900/spl℃，30 s, N/sub 2/退火后，两个栅极堆都表现出优异的漏电流和良好的热稳定性，而TaN/多晶硅ZrO/sub 2/器件即使在1000/spl℃，30 s, N/sub 2/退火后也表现出优异的热稳定性。此外，与TaN器件相比，TaN/多晶硅器件对CV、电荷捕获和TDDB特性的频率依赖性可以忽略不计。性能良好的n - mosfet具有TaN和TaN/多晶硅栅电极。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

MOS devices with high quality ultra thin CVD ZrO/sub 2/ gate dielectrics and self-aligned TaN and TaN/poly-Si gate electrodes

In this paper, we have successfully fabricated and characterized self-aligned TaN and TaN/poly-Si gated n-MOSFETs with ultra thin (EOT=11 /spl Aring/) CVD ZrO/sub 2/ gate dielectrics. It is show that while both gate stacks show excellent leakage current and good thermal stability after a 900/spl deg/C, 30 s, N/sub 2/ anneal, the TaN/poly-Si ZrO/sub 2/ devices exhibit superior thermal stability even after 1000/spl deg/C, 30 s, N/sub 2/ anneal. In addition, the TaN/poly-Si devices show negligible frequency dependence of CV, charge trapping, and superior TDDB characteristics, compared to TaN devices. Well-behaved N-MOSFETs with both TaN and TaN/poly-Si gate electrodes are demonstrated.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)

自引率

0.00%

发文量