{"title":"对容错并行处理器操作系统的概念和性能测量进行概述","authors":"C.A. Babikyan","doi":"10.1109/DASC.1990.111316","DOIUrl":null,"url":null,"abstract":"It is pointed out that mission critical applications of the future will require a computing system capable of high throughput as well as very high reliability. The fault tolerant parallel processor (FTPP), a system designed specifically to satisfy these goals, is described. The FTPP architecture consists of interconnection network/redundancy management hardware and standard commercial processors. The architecture provides flexibility in the appropriate balance of throughput and reliability for a given application. Furthermore, to maintain a system of high reliability the FTPP expeditiously identifies faulty components and performs some remedial operations. These redundancy management functions are performed by the operating system to relive the application from the knowledge of the underlying fault tolerance. How the operating system achieves redundancy management in conjunction with the fault tolerant hardware is described. Performance data to characterize system behavior are presented. Performance measurements indicate that the cost of fault tolerance does not significantly penalize forming redundancy management functions requires a mere .93 ms/frame more than a simplex processor performing no redundancy management.<<ETX>>","PeriodicalId":141205,"journal":{"name":"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"The fault tolerant parallel processor operating system concepts and performance measurement overview\",\"authors\":\"C.A. Babikyan\",\"doi\":\"10.1109/DASC.1990.111316\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"It is pointed out that mission critical applications of the future will require a computing system capable of high throughput as well as very high reliability. The fault tolerant parallel processor (FTPP), a system designed specifically to satisfy these goals, is described. The FTPP architecture consists of interconnection network/redundancy management hardware and standard commercial processors. The architecture provides flexibility in the appropriate balance of throughput and reliability for a given application. Furthermore, to maintain a system of high reliability the FTPP expeditiously identifies faulty components and performs some remedial operations. These redundancy management functions are performed by the operating system to relive the application from the knowledge of the underlying fault tolerance. How the operating system achieves redundancy management in conjunction with the fault tolerant hardware is described. Performance data to characterize system behavior are presented. Performance measurements indicate that the cost of fault tolerance does not significantly penalize forming redundancy management functions requires a mere .93 ms/frame more than a simplex processor performing no redundancy management.<<ETX>>\",\"PeriodicalId\":141205,\"journal\":{\"name\":\"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-10-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DASC.1990.111316\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASC.1990.111316","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The fault tolerant parallel processor operating system concepts and performance measurement overview
It is pointed out that mission critical applications of the future will require a computing system capable of high throughput as well as very high reliability. The fault tolerant parallel processor (FTPP), a system designed specifically to satisfy these goals, is described. The FTPP architecture consists of interconnection network/redundancy management hardware and standard commercial processors. The architecture provides flexibility in the appropriate balance of throughput and reliability for a given application. Furthermore, to maintain a system of high reliability the FTPP expeditiously identifies faulty components and performs some remedial operations. These redundancy management functions are performed by the operating system to relive the application from the knowledge of the underlying fault tolerance. How the operating system achieves redundancy management in conjunction with the fault tolerant hardware is described. Performance data to characterize system behavior are presented. Performance measurements indicate that the cost of fault tolerance does not significantly penalize forming redundancy management functions requires a mere .93 ms/frame more than a simplex processor performing no redundancy management.<>