Charge based compact model for bulk FinFETs

Multiple-gate MOSFETs are widely recognized as the most promising nanometric transistors for end of roadmap integrated circuits. These devices have therefore a great potential for low voltage, low power analog and digital applications. FinFETs fabricated on bulk wafers gained attention due to the possibility of their integration with standard bulk CMOS technology and reduced wafer cost. In the present work, the charge based Symmetric Doped Double-Gate Model (SDDGM) is applied to this new generation of FinFETs transistors, showing the possibilities of this model to describe the transistor behavior in all operating regions and at different temperatures. Three types of bulk FinFETS were modeled, including N-type and P-type. Comparison between measured and modeled transfer characteristics in all regions of operation, and varying the operating temperature from 25°C to 175°C, gives a good agreement extracting only eight parameters. These results demonstrated that the model SDDGM is also suitable for using in circuit simulation of chips bulk FinFETs devices.