面向高性能外设总线的物理桥设计:一种开源方法

Arjun Suresh, Somesh Nandi
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引用次数: 0

摘要

ARM提供的高级微控制器总线架构(AMBA)是半导体行业中最广泛使用的片上系统(SoC)设计标准之一。AMBA定义的规范为高性能芯片组的设计提供了许多优势,如首次开发和技术独立。本文主要讨论了高级高性能总线(AHB)和高级外围总线(APB)两种协议。请记住,这些规范是一个开放标准,我们的目标是开发一个AMBA AHB-APB桥,从寄存器传输级别(RTL)到图形显示系统(GDSII),仅使用开源工具和库。本设计采用Verilog硬件定义语言(HDL)开发,然后进行编译和功能仿真。验证后进行物理设计,得到桥接模块的图形显示。对所获得结果的详细分析表明,开源选项对于测试各种数字设计是可行的,从而避免了投资昂贵的专有设计工具的需要。这将大大提高超大规模集成电路(VLSI)设计的范围和范围,从而产生效益。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Physical Bridge Design for High Performance to Peripheral Bus: An Open Source Approach
The Advanced Microcontroller Bus Architecture (AMBA) offering from ARM is one of the most widely used standards for System on Chip (SoC) design in the semiconductor industry. The specifications defined by AMBA provide many advantages such as right-first-time development and technology independence for design of high performance chipsets. The main focus in this paper is on two protocols - Advanced Highperformance Bus (AHB) and Advanced peripheral Bus (APB). Keeping in mind that these specifications are an open standard, we aim to develop an AMBA AHB-APB bridge from Register Transfer Level (RTL) to Graphical Display System (GDSII) using only open source tools and libraries. The proposed design is developed with Verilog Hardware Definition Language (HDL), followed by compilation and functional simulation. Physical design is performed after verification to obtain graphical display of the bridge module. Detailed analysis of the results obtained indicates that open source options are viable to test various digital designs obviating the need to invest in expensive proprietary design tools. This would accrue benefit by greatly improving the scope and reach of Very Large Scale Integration (VLSI) design.
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