多单元快闪存储系统的一种有效均衡技术

Reza A. Ashrafi, A. E. Pusane
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引用次数: 2

摘要

NAND闪存,由于其几个理想的特性,最近主导了存储技术及其全球市场。多层单元(MLC)闪存由于每个单元包含1位以上的数据而具有更高的存储容量,因此受到了相当多的关注,并且构建更小、更密集的存储单元的研究仍在继续。研究表明,在MLC记忆的各种错误源中,细胞间干扰是最重要的一种。因此,简单、可行、有效的均衡技术对数据可靠性至关重要。在本文中,我们分析了所提出的有效均衡器的误差性能,并利用低密度奇偶校验错误控制方案构建了一种联合均衡编码方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An efficient equalization technique for multi-level cell flash memory storage systems
NAND Flash memories, due to their several desirable characteristics, have recently dominated the storage technology and its global market. Multi-level cell (MLC) Flash memories, which have higher storage capacities as each cell contains more than one bit of data, have gained considerable amount of attention and researches to build smaller and denser memory cells continue. Studies have shown that, among various error sources in MLC memories, inter-cell interference is the significant one. Therefore, simple, feasible, and yet effective equalization techniques are vital for data reliability. In this paper, we have analyzed the error performance of the proposed effective equalizer, while low- density parity-check error control scheme has also been utilized to construct a joint equalization-coding scheme.
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