3GPP移动无线系统集成电路

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012850

C. Nicol, M. Cooke

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引用次数: 5

摘要

本文介绍了第三代移动无线系统中用于基带处理的集成电路体系结构。描述了宽带CDMA接收机的RAKE、速率解/匹配、信道解/交织、信道解/编码和多用户检测等功能。给出了一个3GPP信道解码器和一个多用户基带信号处理器的硅实现。高速下行分组接入(HSDPA)系统提供下行数据速率超过10 Mbps和20 Mbps多输入/多输出(MIMO)扩展。给出了采用V-BLAST MIMO检测算法的移动终端21.6 Mbps MIMO HSDPA接收机的结构。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Integrated circuits for 3GPP mobile wireless systems

This paper describes the architecture of integrated circuits for base-band processing in 3rd Generation (3G) mobile wireless systems. Wideband CDMA receiver functions including the RAKE, rate de/matching, channel de/interleaving, channel de/coding and multi-user detection are described. Silicon implementations of a 3GPP channel decoder and also a multi-user base-band signal processor are presented. The high speed downlink packet access (HSDPA) system providing downlink data rates in excess of 10 Mbps and the 20 Mbps multiple input/multiple output (MIMO) extensions are also described. The architecture of a 21.6 Mbps MIMO HSDPA receiver for mobile terminals with 2 or 4 antennas is shown that uses the V-BLAST MIMO detection algorithm.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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