{"title":"纳米级器件的电热建模","authors":"D. Vasileska, K. Raleva, S. Goodnick","doi":"10.1109/MIEL.2010.5490455","DOIUrl":null,"url":null,"abstract":"In this paper we present simulation results obtained with our electro-thermal device simulator when modeling different technology generations of FD-SOI devices. In particular, we stress out the importance of the temperature boundary conditions for digital and analog circuits and the use of the full model which takes into account both temperature and thickness dependence (which is particularly important for thin silicon films) of the thermal conductivity.","PeriodicalId":330522,"journal":{"name":"2009 15th International Workshop on Thermal Investigations of ICs and Systems","volume":"92 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Electro-thermal modeling of nano-scale devices\",\"authors\":\"D. Vasileska, K. Raleva, S. Goodnick\",\"doi\":\"10.1109/MIEL.2010.5490455\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present simulation results obtained with our electro-thermal device simulator when modeling different technology generations of FD-SOI devices. In particular, we stress out the importance of the temperature boundary conditions for digital and analog circuits and the use of the full model which takes into account both temperature and thickness dependence (which is particularly important for thin silicon films) of the thermal conductivity.\",\"PeriodicalId\":330522,\"journal\":{\"name\":\"2009 15th International Workshop on Thermal Investigations of ICs and Systems\",\"volume\":\"92 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 15th International Workshop on Thermal Investigations of ICs and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MIEL.2010.5490455\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 15th International Workshop on Thermal Investigations of ICs and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2010.5490455","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper we present simulation results obtained with our electro-thermal device simulator when modeling different technology generations of FD-SOI devices. In particular, we stress out the importance of the temperature boundary conditions for digital and analog circuits and the use of the full model which takes into account both temperature and thickness dependence (which is particularly important for thin silicon films) of the thermal conductivity.