{"title":"基于多目标优化的半导体晶圆制造调度","authors":"Zuntong Wang, F. Qiao, Qidi Wu","doi":"10.1109/COASE.2006.326889","DOIUrl":null,"url":null,"abstract":"CPC is a compound priority control strategy used for scheduling semiconductor wafer fabrication. The compound priority of wafers is calculated according to their current processing step, to the amount of wafers waiting for processing in current step buffer, in upstream step buffer, and in downstream step buffer. Wafers with the highest compound priority are dispatched to certain machine to be processed. Compared to common used scheduling strategies, CPC strategy exhibits high performance in reducing total amount of WIP, decreasing cycle time and its standard deviation, and increasing the throughput rate","PeriodicalId":116108,"journal":{"name":"2006 IEEE International Conference on Automation Science and Engineering","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Scheduling Semiconductor Wafer Fabrication with Optimization of Multiple objectives\",\"authors\":\"Zuntong Wang, F. Qiao, Qidi Wu\",\"doi\":\"10.1109/COASE.2006.326889\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"CPC is a compound priority control strategy used for scheduling semiconductor wafer fabrication. The compound priority of wafers is calculated according to their current processing step, to the amount of wafers waiting for processing in current step buffer, in upstream step buffer, and in downstream step buffer. Wafers with the highest compound priority are dispatched to certain machine to be processed. Compared to common used scheduling strategies, CPC strategy exhibits high performance in reducing total amount of WIP, decreasing cycle time and its standard deviation, and increasing the throughput rate\",\"PeriodicalId\":116108,\"journal\":{\"name\":\"2006 IEEE International Conference on Automation Science and Engineering\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Conference on Automation Science and Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/COASE.2006.326889\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Conference on Automation Science and Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COASE.2006.326889","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scheduling Semiconductor Wafer Fabrication with Optimization of Multiple objectives
CPC is a compound priority control strategy used for scheduling semiconductor wafer fabrication. The compound priority of wafers is calculated according to their current processing step, to the amount of wafers waiting for processing in current step buffer, in upstream step buffer, and in downstream step buffer. Wafers with the highest compound priority are dispatched to certain machine to be processed. Compared to common used scheduling strategies, CPC strategy exhibits high performance in reducing total amount of WIP, decreasing cycle time and its standard deviation, and increasing the throughput rate