二维DWT系统架构的设计空间探索

Ishmael Sameen, Yoong Choon Chang, N. Song, B. Goi, Chee Siong Lee
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引用次数: 0

摘要

提出了一种基于JPEG-2000标准的可编程二维DWT系统体系结构。所提出的系统架构源自使用Altera的C2H编译器的迭代设计空间探索过程,与优化的二维DWT软件实现相比,提供了显著的二维DWT性能加速,并且在Altera DE3 Stratix III FPGA板上合成和测试时能够实现高达720p (1280 × 720)图像分辨率的实时视频处理性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design space exploration of a 2-D DWT system architecture
This paper proposes a programmable 2-D DWT system architecture designed for the JPEG-2000 standard. The proposed system architecture, derived from an iterative design space exploration process using Altera's C2H compiler, provides a significant performance acceleration of 2-D DWT when compared to an optimized 2-D DWT software implementation and is capable of real-time video processing performance up to 720p (1280 × 720) image resolutions when synthesized and tested on an Altera DE3 Stratix III FPGA board.
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