用于实时设计验证的快速系统原型

M. Courtoy
{"title":"用于实时设计验证的快速系统原型","authors":"M. Courtoy","doi":"10.1109/IWRSP.1998.676677","DOIUrl":null,"url":null,"abstract":"System emulation technology enables users to rapidly prototype HDL-based designs on programmable hardware before committing their designs to production. In this paper, we show that this methodology is particularly viable for at-speed verification of communications designs. We show how complimentary tools can be used to generate HDL code for a digital wireless communications system. Then we consider how this design can be implemented and evaluated using a rapid prototyping methodology. Synthesis produces a gate-level specification for implementation in FPGAs which are combined with other components in the Aptix rapid prototyping environment. Issues discussed include: software tool flows, prototype hardware assembly, system performance and debugging.","PeriodicalId":310447,"journal":{"name":"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"Rapid system prototyping for real-time design validation\",\"authors\":\"M. Courtoy\",\"doi\":\"10.1109/IWRSP.1998.676677\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"System emulation technology enables users to rapidly prototype HDL-based designs on programmable hardware before committing their designs to production. In this paper, we show that this methodology is particularly viable for at-speed verification of communications designs. We show how complimentary tools can be used to generate HDL code for a digital wireless communications system. Then we consider how this design can be implemented and evaluated using a rapid prototyping methodology. Synthesis produces a gate-level specification for implementation in FPGAs which are combined with other components in the Aptix rapid prototyping environment. Issues discussed include: software tool flows, prototype hardware assembly, system performance and debugging.\",\"PeriodicalId\":310447,\"journal\":{\"name\":\"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWRSP.1998.676677\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWRSP.1998.676677","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21

摘要

系统仿真技术使用户能够在将设计投入生产之前,在可编程硬件上快速构建基于hdl的设计原型。在本文中,我们表明这种方法对于通信设计的高速验证特别可行。我们展示了如何使用互补工具为数字无线通信系统生成HDL代码。然后,我们考虑如何使用快速原型方法实现和评估该设计。在Aptix快速原型环境中与其他组件相结合的fpga中,合成产生一个门级规范。讨论的问题包括:软件工具流程,原型硬件组装,系统性能和调试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Rapid system prototyping for real-time design validation
System emulation technology enables users to rapidly prototype HDL-based designs on programmable hardware before committing their designs to production. In this paper, we show that this methodology is particularly viable for at-speed verification of communications designs. We show how complimentary tools can be used to generate HDL code for a digital wireless communications system. Then we consider how this design can be implemented and evaluated using a rapid prototyping methodology. Synthesis produces a gate-level specification for implementation in FPGAs which are combined with other components in the Aptix rapid prototyping environment. Issues discussed include: software tool flows, prototype hardware assembly, system performance and debugging.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信