{"title":"一种创新的基于fpga的ADC/DAC设计,采用1位自适应增量调制","authors":"S. Akash, Dey Sayantan, S. Iti","doi":"10.26634/jcir.10.2.18902","DOIUrl":null,"url":null,"abstract":"The Analog-to-Digital Converter (ADC), with its wide variety of applications in the electronics and communication domains, is the most crucial unit in every digital gadget. This paper discusses a smart way of converting an input analog signal to its digital counterpart using an innovative Adaptive-Delta modulator, followed by a signal reconstruction process to retrieve the original message. It has done the design in Matrix Laboratory (MATLAB) Simulink, and the hardware implementation is tested on the Xilinx Spartan-6 LX45 FPGA core. This design aims for high-accuracy conversion and optimization of hardware resources. The 1-bit adaptive model is superior in comparison to the traditional delta modulation (DM) scheme while tracking stiff analog input signals, producing a much lower mean square error. The implementation is quite simple as it uses the transmission of 1-bit digital data at a time. On the receiver side, digital-toanalog conversion (DAC) makes use of the same adaptive logic in reconstructing the original input signal. The designed prototype demonstrates its resistance to a wide range of input amplitude and frequency variations. The ADC-DAC design method in this paper is accurate, makes the best use of resources, and is easy to use.","PeriodicalId":408741,"journal":{"name":"i-manager's Journal on Circuits and Systems","volume":"101 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An innovative FPGA-based ADC/DAC design using 1-bit adaptive-delta modulation\",\"authors\":\"S. Akash, Dey Sayantan, S. Iti\",\"doi\":\"10.26634/jcir.10.2.18902\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The Analog-to-Digital Converter (ADC), with its wide variety of applications in the electronics and communication domains, is the most crucial unit in every digital gadget. This paper discusses a smart way of converting an input analog signal to its digital counterpart using an innovative Adaptive-Delta modulator, followed by a signal reconstruction process to retrieve the original message. It has done the design in Matrix Laboratory (MATLAB) Simulink, and the hardware implementation is tested on the Xilinx Spartan-6 LX45 FPGA core. This design aims for high-accuracy conversion and optimization of hardware resources. The 1-bit adaptive model is superior in comparison to the traditional delta modulation (DM) scheme while tracking stiff analog input signals, producing a much lower mean square error. The implementation is quite simple as it uses the transmission of 1-bit digital data at a time. On the receiver side, digital-toanalog conversion (DAC) makes use of the same adaptive logic in reconstructing the original input signal. The designed prototype demonstrates its resistance to a wide range of input amplitude and frequency variations. The ADC-DAC design method in this paper is accurate, makes the best use of resources, and is easy to use.\",\"PeriodicalId\":408741,\"journal\":{\"name\":\"i-manager's Journal on Circuits and Systems\",\"volume\":\"101 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"i-manager's Journal on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.26634/jcir.10.2.18902\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"i-manager's Journal on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.26634/jcir.10.2.18902","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An innovative FPGA-based ADC/DAC design using 1-bit adaptive-delta modulation
The Analog-to-Digital Converter (ADC), with its wide variety of applications in the electronics and communication domains, is the most crucial unit in every digital gadget. This paper discusses a smart way of converting an input analog signal to its digital counterpart using an innovative Adaptive-Delta modulator, followed by a signal reconstruction process to retrieve the original message. It has done the design in Matrix Laboratory (MATLAB) Simulink, and the hardware implementation is tested on the Xilinx Spartan-6 LX45 FPGA core. This design aims for high-accuracy conversion and optimization of hardware resources. The 1-bit adaptive model is superior in comparison to the traditional delta modulation (DM) scheme while tracking stiff analog input signals, producing a much lower mean square error. The implementation is quite simple as it uses the transmission of 1-bit digital data at a time. On the receiver side, digital-toanalog conversion (DAC) makes use of the same adaptive logic in reconstructing the original input signal. The designed prototype demonstrates its resistance to a wide range of input amplitude and frequency variations. The ADC-DAC design method in this paper is accurate, makes the best use of resources, and is easy to use.