用于辐射探测器读出前端的CMOS低功耗模拟/数字混合ASIC的设计与测试

L. Hebrand, J. Blonde, C. Colledani, G. Clauss
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引用次数: 6

摘要

介绍了一种用于辐射探测器读出前端的CMOS低功耗混合A/D专用集成电路。首先,我们回顾了辐射检测系统的原理,然后描述了整个电路的结构。然后讨论集中在低功耗问题上。通过创新的128:1模拟多路复用器,我们展示了如何在不牺牲输入范围和读出速率等限制性规格的情况下大幅降低平均功耗。测试混合A/D,但强模拟IC也是这里要解决的大问题。在ASIC中实现了特定的内置测试模拟子电路,以及用于选择要执行的测试类型的JTAG模块。该模块还用于控制和调谐电路的偏置电流。最后,给出了测试结果,结果表明该系统完全满足设计要求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and test of a CMOS low-power mixed-analog/digital ASIC for radiation detector readout front ends
A new CMOS low-power mixed A/D ASIC for radiation detector readout front ends is presented. First, we recall the principle of radiation detection system before describing the whole architecture of the circuit. The discussion is then focused on the low-power issue. By means of an innovative 128:1 analog multiplexer, we show how we drastically reduced the mean power consumption without sacrificing constraining specifications such as the input range and the readout rate. Testing mixed A/D, but strongly analog IC is also a big issue which is addressed here. Specific built-in test analog sub-circuits have been implemented in the ASIC, along with a JTAG module used to choose the type of test to perform. This module is also used to control and tune the biasing currents of the circuit. Finally, test results are presented and show that all the specifications are satisfied.
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