带改进混合积分器的σ δ调制器

S. Thirunakkarasu, Abul Bashar M. Ishteak Hossain, B. J. Farahani
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引用次数: 1

摘要

本文描述了一种使用混合积分器的改进二阶sigma-delta (SigmaDelta)调制器,该调制器专为WLAN应用而设计。混合积分器由模拟积分器和数字积分器组成,其中模拟积分器的溢出由数字积分器处理,从而提高了动态范围。结果表明,在相同过采样比(OSR)的情况下,该调制器的动态范围比传统的σ δ调制器提高了8db,并且在模拟模块和数字模块之间存在任何不匹配的情况下具有很强的鲁棒性。该方案的另一个显著优点是过载水平(OL)提高了约8.6 db。该调制器结构采用320 MHz的采样频率实现,信号带宽为10 MHz,过采样比为16。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Sigma delta modulators with modified hybrid integrators
This paper describes a modified second-order sigma-delta (SigmaDelta) modulator using hybrid integrators that is designed for WLAN applications. Hybrid integrators are composed of analog and digital integrators where the overflow of an analog integrator is processed by a digital integrator which results in the improvement of dynamic range. It is shown that the presented modulator achieves 8-dB improvement in dynamic range compared to conventional sigma delta modulator with the same oversampling ratio (OSR) and also it is very robust incase of any mismatch between the analog and the digital blocks. Another significant advantage of this scheme is that the overload level (OL) is increased by about 8.6-dB. The presented modulator architecture is implemented using a sampling frequency of 320 MHz for a 10 MHz signal bandwidth with an oversampling ratio of 16.
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