发布求助
文献互助 智能选刊 最新文献

The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.最新文献

筛选
英文 中文
Moment computations for R(L)C interconnects with multiple resistor loops using ROBDD techniques 利用ROBDD技术计算带有多个电阻回路的R(L)C互连的力矩
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412814
Herng-Jer Lee, M. Lai, C. Chu, W. Feng
{"title":"Moment computations for R(L)C interconnects with multiple resistor loops using ROBDD techniques","authors":"Herng-Jer Lee, M. Lai, C. Chu, W. Feng","doi":"10.1109/APCCAS.2004.1412814","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412814","url":null,"abstract":"A new moment computation technique for general lumped R(L)C interconnect circuits with multiple resistor loops is proposed. Using the concept of tearing, a lumped R(L)C network can be partitioned into a spanning tree and several resistor links. The contributions of network moments from each tree and the corresponding links can be determined independently. By combining the conventional moment computation algorithms and the reduced ordered binary decision diagram (ROBDD), the proposed method can compute system moments efficiently","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130618872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Implementation of half-pel motion estimation IP core for MPEG-4 ASP@L5 texture coding 用于MPEG-4 ASP@L5纹理编码的半像素运动估计IP核实现
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412714
He Wei-feng, Gao Zhi-qiang, Mao Zhi-gang, Zhang Yan
{"title":"Implementation of half-pel motion estimation IP core for MPEG-4 ASP@L5 texture coding","authors":"He Wei-feng, Gao Zhi-qiang, Mao Zhi-gang, Zhang Yan","doi":"10.1109/APCCAS.2004.1412714","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412714","url":null,"abstract":"An efficient fully pipelined parallel 1-D and 2-D mixed motion estimation array architecture for MPEG-4 ASP@L5 encoder is proposed in This work. Unlike most previously presented motion estimation processors, this design can deal with 8/spl times/ block and 16 /spl times/ 6 macroblock motion estimation with different searching ranges in full-pel and half-pel resolution. Experimental results show that it is able to estimate half-pel texture motion vectors of MPEG-4 AS Profile in ITU-R601 format in real-time at around 100MHz.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130645898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
New concept of damper on mulimachine power system 多机动力系统阻尼器的新概念
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412987
I. Robandi
{"title":"New concept of damper on mulimachine power system","authors":"I. Robandi","doi":"10.1109/APCCAS.2004.1412987","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412987","url":null,"abstract":"This paper presents a new concept to design optimal power system stabilizer (PSS) as a damper on a multimachine power system control. This concept is developed 6om the proportional and integral (PI) control and linear quadratic regulator (LQR) method as a modem tool to design the PSS as optimal PSS. Using this concept, the stabilizers of the multimachine are designed for the turbine and excitation system side using the Riccati solution, as a character of LQR optimal control method solving. In this paper, the design of the optimal PSS is compared with the conventional PSS (CPSS) and No PSS system. In the final results, the application of optimal PSS as a damper of power system can greatly improve the performances of multimachine power system, and it shows the best results","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"460 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116775292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An efficient 2-D DWT processor architecture based on state space implementation technique 基于状态空间实现技术的高效二维DWT处理器体系结构
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412966
Gab Jung, S. Park, Jung H. Kim
{"title":"An efficient 2-D DWT processor architecture based on state space implementation technique","authors":"Gab Jung, S. Park, Jung H. Kim","doi":"10.1109/APCCAS.2004.1412966","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412966","url":null,"abstract":"This work presents an efficient processor architecture which is constructed by filter bank or lifting scheme for real time processing of separable 2-D discrete wavelet transform (DWT). To achieve high efficiency, we use the partitioning algorithm based on the state space representation technique and RPA-like scheme. As a result, the architecture can reduce the critical path by the state space implementation. It has smaller hardware resources compared to that of other architectures with comparable throughput by the improvement of hardware utilization.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132829018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
GA-based evolutionary interleaver design for turbo codes 基于遗传算法的turbo码进化交织器设计
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1413066
Tan Ying, Sun Hong
{"title":"GA-based evolutionary interleaver design for turbo codes","authors":"Tan Ying, Sun Hong","doi":"10.1109/APCCAS.2004.1413066","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1413066","url":null,"abstract":"This paper presents an evolutionary algorithm for generating spread random interleavers for turbo codes, using genetic algorithms (GAS). The approach is called GA-based spread random interleaving. The new interleaver offers a substantial improvement in the error performance over a random interleaver and a noticeable improvement over a s -random interleaver. In addition, the proposed method takes less time to generate spread random interleavers than the s -random algorithms.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128593910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
DTA: layout design tool for CMOS analog circuit DTA: CMOS模拟电路的布局设计工具
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412817
Y. Lai, Yung-Chuan Jiang, Chi-Chou Kao
{"title":"DTA: layout design tool for CMOS analog circuit","authors":"Y. Lai, Yung-Chuan Jiang, Chi-Chou Kao","doi":"10.1109/APCCAS.2004.1412817","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412817","url":null,"abstract":"Layout is an important step in analog IC design. This paper presents an automation design of analog circuit layout by matching of devices and reducing noise coupling to decrease noise sensitivity. We first avoid the mismatch of constructing devices. Then, all devices are placed according to the wire length and area constraints. Finally, an effective approach is proposed to reduce noise coupling in the routing step. We have implemented our design method in several CMOS analog circuits. It can be seen that the proposed method can generate good analog circuit layout with specified timing constraints","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"61 17","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131638056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A survey of error resilient coding schemes for image and video transmission based on data embedding 基于数据嵌入的图像视频传输容错编码方案研究
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412713
Li-Wei Kang, Jin-Jang Leou
{"title":"A survey of error resilient coding schemes for image and video transmission based on data embedding","authors":"Li-Wei Kang, Jin-Jang Leou","doi":"10.1109/APCCAS.2004.1412713","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412713","url":null,"abstract":"For entropy-coded images/video, a transmission error in a codeword results in a great degradation of the received images/video. Recently, several error resilient coding schemes based on data embedding are proposed, in which some important data for error resiliency can be embedded into the compressed bitstream at the encoder. At the decoder, the important data can be extracted for error resiliency so that high-quality images/video can be recovered. In this study, a survey of error resilient coding schemes based on data embedding is presented.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134368068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Can Shannon's channel capacity be challenged? Shannon的频道容量会受到挑战吗?
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412666
Ruey-Wen Liu
{"title":"Can Shannon's channel capacity be challenged?","authors":"Ruey-Wen Liu","doi":"10.1109/APCCAS.2004.1412666","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412666","url":null,"abstract":"There are one source s(t), one jammingj(t), and two outputs xl( t ) and xl ( t ) . The channel coefficients h, are neither known, nor can be identified by usual techniques because the jamming is uncoordinated with the signal. We study two channel capacities: C, the Shannon capacity whenj(t) is Gaussian; and C?, the optimal channel capacity when j ( t ) = 0. We first show that the Shannon capacity C can be achieved by a blind technique. Can the optimal channel capacity C? be achieved even when j ( t ) f O? If so, the Shannon capacity will be broken because C' 7 C whenj(t) f 0. We will show that there is sufficient information in the output from which C' can be achieved. The latest findings will be presented at the Conference.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133132855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Kronecker based fixed polarity transforms over GF(3) GF(3)上基于Kronecker的固定极性变换
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1413029
Cheng Fu, B. Falkowski
{"title":"Kronecker based fixed polarity transforms over GF(3)","authors":"Cheng Fu, B. Falkowski","doi":"10.1109/APCCAS.2004.1413029","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1413029","url":null,"abstract":"Two new fixed polarity linear Kronecker transforms executed over GF(3) are introduced in this article. Both transforms are based on recursive equations using Kronecker products what allows to obtain simple corresponding fast transforms and very regular butterfly diagrams. The computational costs to calculate the new pair of transforms and their experimental comparison with ternary Reed-Muller transform have also been discussed for the purpose of using their error correcting properties that are useful in circuit testing and verification.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128989117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A computationally efficient noise estimation algorithm for speech enhancement 一种计算效率高的语音增强噪声估计算法
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI: 10.1109/APCCAS.2004.1412725
V. G. Reju, T. Y. Chow
{"title":"A computationally efficient noise estimation algorithm for speech enhancement","authors":"V. G. Reju, T. Y. Chow","doi":"10.1109/APCCAS.2004.1412725","DOIUrl":"https://doi.org/10.1109/APCCAS.2004.1412725","url":null,"abstract":"We introduce a computationally efficient noise estimation algorithm for speech enhancement. The algorithm estimates the background noise during the pauses of the speech signal. However, unlike conventional voice activity detectors, the computational complexity and hardware requirement of the proposed algorithm are very low. In this algorithm, the ratio between the total energy and zero crossing rate over a block of data is used to detect the pauses. The pauses are detected after noise reduction and hence the performance is improved.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133962928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
首页 上一页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信