N. Zagni, M. Cioni, M. E. Castagna, M. Moschetti, F. Iucolano, G. Verzellesi, A. Chini
{"title":"Symmetrical VTH/RON Drifts Due to Negative/Positive Gate Stress in p-GaN Power HEMTs","authors":"N. Zagni, M. Cioni, M. E. Castagna, M. Moschetti, F. Iucolano, G. Verzellesi, A. Chini","doi":"10.1109/WiPDA56483.2022.9955267","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955267","url":null,"abstract":"We investigate the drift of threshold voltage (V<inf>TH</inf>) and on-resistance (R<inf>ON</inf>) in p-GaN power HEMTs after being submitted to negative/positive gate stress. Negative (Positive) Gate Stress (NGS/PGS) was applied at a gate-to-source bias of |V<inf>NGS</inf>| = V<inf>PGS</inf> = 6 V up to a cumulative stress time of 8×10<sup>3</sup> s at room temperature. We found that during NGS both V<inf>TH</inf> and R<inf>ON</inf> increased over stress time, whereas during PGS both parameters decreased and stabilized to the values prior to stress application. This symmetric behavior was maintained after 5 full NGS/PGS stress cycles, indicating the absence of permanent degradation. To further characterize the V<inf>TH</inf> and R<inf>ON</inf> transients, the NGS/PGS stress cycles were repeated at different temperatures (T=30-105 °C). While V<inf>TH</inf> exhibited a strong Τ-dependence (E<inf>A</inf> ≈ 0.6 eV) during NGS, a negligible variation of the V<inf>TH</inf> transients with T was found during PGS (E<inf>A</inf> ≈ 0 eV). Instead, R<inf>ON</inf> transients exhibited approximately the same T-dependence during both NGS and PGS (E<inf>A</inf> ≈ 0.3-0.4 eV).","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129159894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Satpathy, Partha Pratim Das, S. Bhattacharya, V. Veliadis
{"title":"Design Considerations of a GaN-based Three-Level Traction Inverter for Electric Vehicles","authors":"S. Satpathy, Partha Pratim Das, S. Bhattacharya, V. Veliadis","doi":"10.1109/WiPDA56483.2022.9955248","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955248","url":null,"abstract":"This paper demonstrates a GaN-based three-level inverter design for an electric vehicle (EV) traction application. The basic power block is a three-level active neutral point clamped (3L-ANPC) converter operating at 800V DC bus voltage with the use of two paralleled 650V, 60A GaN E-HEMTs. The paper focuses on switching mode selection for better thermal performance of high-power 3L-ANPC inverters. The paper presents design details and guidelines for power layout structure and gate driver. The key parasitic inductances of the designed power block are extracted using ANSYS Q3D. A PLECS simulation model using the device loss parameters shows approximate power delivering capability of 41kW for the designed forced air-cooled three-phase inverter. Experimental double pulse test results are presented with low voltage overshoot to verify the low inductance power loop design. Experimental results of the three-phase 3L-ANPC inverter operation at 70kHz switching frequency are presented for delivered output power of 5.1kW at 550V DC.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128903910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shrivatsal Sharma, Yos Prabowo, S. Satpathy, S. Bhattacharya
{"title":"Advantages of SiC-Based Devices on the Design of Dual-Active Bridge DC/DC Converter for DC faults","authors":"Shrivatsal Sharma, Yos Prabowo, S. Satpathy, S. Bhattacharya","doi":"10.1109/WiPDA56483.2022.9955281","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955281","url":null,"abstract":"DC short circuit fault ride-through is a critical feature for the reliability and performance of DC microgrids. This paper presents the advantage that SiC-based devices offer for designing a Dual-Active Bridge (DAB) DC-DC converter while considering DC short circuit events. It is known that SiC-MOSFET devices have a higher transient current carrying capability than Si-IGBT devices due to their superior thermal conductivity. This characteristic of SiC-MOSFET devices is utilized to improve the design of DAB for DC short circuit fault ride-through applications. An analytical model is developed to understand the performance of a DAB during DC short circuit faults. Switching and thermal simulations are used to validate the analytical model and compare DAB designs based on SiC-MOSFET and Si-IGBT. The advantages of SiC-MOSFET enabled DAB compared to Si-IGBT enabled DAB are also quantified for a particular application of DAB in a DC microgrid. It is shown that for fault ride-through applications, DAB enabled with SiC-MOSFET can be designed for lower phase shifts compared to Si-IGBT enabled DAB, which inherently reduces the inductor size and circulating current in a DAB.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125490497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Dennis Meyer, Xuning Zhang, R. Garg, B. Odekirk, Steven Chenetz, Ehab Tarmoom, K. Speer
{"title":"Failure Rate Calculation Due to Neutron Flux with SiC MOSFETs and Schottky Diodes","authors":"Dennis Meyer, Xuning Zhang, R. Garg, B. Odekirk, Steven Chenetz, Ehab Tarmoom, K. Speer","doi":"10.1109/WiPDA56483.2022.9955309","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955309","url":null,"abstract":"Neutron-induced failures in power electronics are a source of concern in many high-reliability applications. This paper describes how to estimate the device’s decreased lifetime expectancy based on its usage. The physical mechanism, Failure in Time (FIT) statistics and FIT rate calculation methodology are presented. Several Microchip SiC MOSFETs and Schottky barrier diodes at different voltage ratings were tested, and the results for the excess FIT rate calculation based on various factors such as operation voltage, altitude, device area, latitude, and duty factor are presented.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130890130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Flux Balancing Strategy for 10-kV SiC-Based Dual-Active-Bridge Converter","authors":"Zihan Gao, Pengfei Yao, Haiguo Li, Fred Wang","doi":"10.1109/WiPDA56483.2022.9955288","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955288","url":null,"abstract":"The transformer flux unbalance in dual-active-bridge (DAB) converters is a critical issue due to the electrical parameter and modulation mismatch, and load or control transients. Compared to low voltage DAB converters, the unbalance problem in medium voltage DAB converters may cause more severe problem, and become more difficult to deal with, because of the high operating voltage and insulation requirement. In this paper, a flux balancing strategy for a medium voltage (MV) DAB converter is proposed, including the transformer design with ferrite gap, current harmonic-based unbalance detection, as well as the flux balancing control scheme. With the proposed ferrite gap, nonlinear magnetizing current and its modeling are induced. Then, by analyzing the current harmonics, the flux unbalance level can be detected, and hence controlled. Test results have verified the proposed method in a MV DAB converter.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130058196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Medium-Voltage Transformer with Integrated Leakage Inductance for 10 kV SiC-Based Dual-Active-Bridge Converter","authors":"Zihan Gao, Haiguo Li, Fred Wang","doi":"10.1109/WiPDA56483.2022.9955258","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955258","url":null,"abstract":"Medium-voltage (MV) dual-active-bridge (DAB) converters have become an emerging technology thanks to high-voltage silicon carbide (SiC) devices and nanocrystalline magnetic materials. However, the need of phase-shift inductance and insulation requirements for the MV DAB may complicate the design of the transformer and the MV DAB converter, which can also induce higher loss and occupy more space. In this paper, the leakage integration and insulation techniques are discussed for a 6.7-kV/850-V DAB converter, meeting both the inductance and insulation requirements of the MV DAB converter. Ferrite cores with air gaps are inserted between the LV and MV windings without introducing high loss, and the MV winding is selectively shielded to avoid high parasitics and meet the insulation requirement. Test results have verified the effectiveness of this design.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129502215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Active Gate Driving of Cascoded SiC JFETs","authors":"Arijit Sengupta, Sima Azizi Aghdam, M. Agamy","doi":"10.1109/WiPDA56483.2022.9955275","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955275","url":null,"abstract":"In this paper, the gate driving characteristics of a SiC cascoded Junction Field Effect Transistor (JFET) is explored. Firstly, a Conventional Gate Drive (CGD) circuit is analyzed and implemented, followed by the proposal and implementation of two Active Gate Driving (AGD) methods for the cascoded JFET. Two approaches of gate control are explored: i) using the low-voltage -MOSFET gate & (ii) using the JFET gate. Switching characteristics during turn-on and turn-off for the CGD and both AGD approaches are compared, and it is observed that the proposed AGD circuits provide controllability of both switching edges and thus allowing an application optimized switching operation. Analytical, simulation and experimental results are shown to verify the proposed methods.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122283474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Justin Lynch, Nick Yun, S. Jang, Adam J. Morgan, Woongje Sung
{"title":"A New Layout Method for Junction Field Effect Transistors (JFETs) on 4H-SiC that Provides a Significant Reduction in On-Resistance","authors":"Justin Lynch, Nick Yun, S. Jang, Adam J. Morgan, Woongje Sung","doi":"10.1109/WiPDA56483.2022.9955256","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955256","url":null,"abstract":"In this work, we demonstrate a new layout technique for 1.2kV-rated lateral-vertical 4H-SiC JFETs that provides a 21% reduction of the specific on-resistance (Ron,sp) when compared to JFETs using the conventional stripe layout. Both the proposed and conventional layouts were fabricated on the same substrate and achieved a Ron,sp of 3.13 mΩ-cm2 and 3.97 mΩ-cm2 at a VGS of 0 V and 2.46 mΩ-cm2 and 3.12 mΩ-cm2 at a VGS of 2 V during on wafer measurement, respectively. Additionally, the proposed layout approach showed no adverse influence on the blocking characteristics of the device. The demonstration of this proposed layout approach shows the high-performance potential of 4H-SiC JFETs.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117068541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Threshold Voltage Behavior and Short-Circuit Capability of p-Gate GaN HEMTs Depending on Drain- and Gate-Voltage Stress","authors":"T. Oeder, M. Pfost","doi":"10.1109/WiPDA56483.2022.9955266","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955266","url":null,"abstract":"In this study, the impact and correlation of drain- and gate-voltage stress on the threshold voltage of commercially available p-gate GaN HEMTs are investigated. This is based on single-pulse measurements acquired with a custom pulse setup, thus the transient behavior can be determined and subsequently translated into dc characteristics. As a novelty, measurements of the threshold voltage for short-circuit stress of up to 600 V are shown. As a result, a constant threshold voltage shift is observed for on-state drain-voltage stress, while off-state drain-voltage and gate-voltage stress lead to a threshold voltage instability. Finally, drain stress and gate stress appears to superimpose, consequently already application-relevant gate-driving conditions show a drastic impact of the short-circuit capability.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123792181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jiashu Qian, Tianshi Liu, Jake Soto, M. Al‐Jassim, R. Stahlbush, N. Mahadik, Limeng Shi, Michael Jin, A. Agarwal
{"title":"A Comparison of Ion Implantation at Room Temperature and Heated Ion Implantation on the Body Diode Degradation of Commercial 3.3 kV 4H-SiC Power MOSFETs","authors":"Jiashu Qian, Tianshi Liu, Jake Soto, M. Al‐Jassim, R. Stahlbush, N. Mahadik, Limeng Shi, Michael Jin, A. Agarwal","doi":"10.1109/WiPDA56483.2022.9955255","DOIUrl":"https://doi.org/10.1109/WiPDA56483.2022.9955255","url":null,"abstract":"It has been demonstrated that basal plane dislocations (BPDs)-induced stacking faults (SFs) cause body diode degradation in commercial 4H-SiC power MOSFETs, especially with higher voltage ratings. BPDs originate from 4H-SiC boule, epi growth, and ion implantation. Considering the lower cost of ion implantation at room temperature (RT), this work investigates the potential of RT ion implantation replacing heated (HT) ion implantation by comparing the influence of both ion implantations on the body diode degradation of commercial 3.3 kV 4H-SiC power MOSFETs. We demonstrate with long-term (up to 1000 hours) forward current stress that RT implantation can keep the body diode degradation of 3.3 kV 4H-SiC power MOSFETs within the specification limits compared with HT implantation.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"200 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116426544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}