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2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)最新文献

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The Impact of Data Pre-Processing Techniques and Dimensionality Reduction on the Accuracy of Machine Learning 数据预处理技术和降维对机器学习精度的影响
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON) Pub Date : 2019-03-01 DOI: 10.1109/IEMECONX.2019.8877011
Hadeel Obaid, Saad Ahmed Dheyab, Sana Sabah Sabry
{"title":"The Impact of Data Pre-Processing Techniques and Dimensionality Reduction on the Accuracy of Machine Learning","authors":"Hadeel Obaid, Saad Ahmed Dheyab, Sana Sabah Sabry","doi":"10.1109/IEMECONX.2019.8877011","DOIUrl":"https://doi.org/10.1109/IEMECONX.2019.8877011","url":null,"abstract":"Data pre-processing is considered as the core stage in machine learning and data mining. Normalization, discretization, and dimensionality reduction are well-known techniques in data pre-processing. This research paper seeks to examine the effects of Min-max, Z-score, Decimal Scaling, and Logarithm to the base 2 on the accuracy of J48 classifier using the NSL-KDD dataset. Experiments were conducted using the above-listed methods and their individual results were compared to each other. Principal component analysis (PCA) and Linear Discriminant Analysis (LDA) were tested for dimensionality reduction; furthermore, a hybrid combination of PCA and LDA was attempted and the performance showed an improved classification accuracy compared to the individual methods.","PeriodicalId":358845,"journal":{"name":"2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128144620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
An Improved SJ UMOS with Modified Gate Electrode to Reduce Gate Charge 一种改进的SJ型UMOS及其栅极修饰以降低栅极电荷
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON) Pub Date : 2019-03-01 DOI: 10.1109/IEMECONX.2019.8877004
Prashant Kushwaha, Payal Nautiyal, Anshul Gupta, Alok Naugarhiya, Shrish Verma
{"title":"An Improved SJ UMOS with Modified Gate Electrode to Reduce Gate Charge","authors":"Prashant Kushwaha, Payal Nautiyal, Anshul Gupta, Alok Naugarhiya, Shrish Verma","doi":"10.1109/IEMECONX.2019.8877004","DOIUrl":"https://doi.org/10.1109/IEMECONX.2019.8877004","url":null,"abstract":"An improved superjunction (SJ) device structure with modified gate electrode has been proposed in this paper. The trench gate has been altered to reduce gate capacitance associated with drain (CGD). Lesser is the CGD, better is the switching performance. The structural modification is optimized to obtain minimum CGD without degrading any other performance parameter. The SJ device considered in this paper has maximum operating voltage of around 680 V. Simulation results demonstrates 44.8% improvement in gate to drain charge of proposed device implying better Figure of merit.","PeriodicalId":358845,"journal":{"name":"2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129019622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Comparison of ARIMA and SVM for Short-term Load Forecasting ARIMA与SVM短期负荷预测的比较
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON) Pub Date : 2019-03-01 DOI: 10.1109/IEMECONX.2019.8877077
M. M. Amin, Md. Murshadul Hoque
{"title":"Comparison of ARIMA and SVM for Short-term Load Forecasting","authors":"M. M. Amin, Md. Murshadul Hoque","doi":"10.1109/IEMECONX.2019.8877077","DOIUrl":"https://doi.org/10.1109/IEMECONX.2019.8877077","url":null,"abstract":"To ensure a stable and reliable operation of a power system network, load forecasting on a short-term basis is very crucial. The two most important requirements of short-term load forecasting are accurate forecasting and speed. It is really necessary to study as well as analyze the load characteristics and to find out the primary factors responsible for obstructing accurate load forecasting. Auto-Regressive Integrated Moving Average (ARIMA) method is most frequently used because it needs only information regarding the historical loads to predict the load and no other assumptions are required to consider. This paper compares the forecasting ability of ARIMA and Support Vector Machines (SVMs) model with the help of the Mean Absolute Percentage Error (MAPE) and Mean Square Error (MSE). After the comparison, it is found that for a non-linear pattern SVM performs better than the ARIMA, whereas ARIMA gives a better show for the approximation of linear type of load.","PeriodicalId":358845,"journal":{"name":"2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128528753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
Eye Center Guided Constrained Local Model for Landmark Localization in Facial Image 眼中心引导的人脸图像地标定位约束局部模型
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON) Pub Date : 2019-03-01 DOI: 10.1109/IEMECONX.2019.8877093
Manir Ahmed, Rizwan Ahmed, Arnab Jyoti Thakuria, R. Laskar
{"title":"Eye Center Guided Constrained Local Model for Landmark Localization in Facial Image","authors":"Manir Ahmed, Rizwan Ahmed, Arnab Jyoti Thakuria, R. Laskar","doi":"10.1109/IEMECONX.2019.8877093","DOIUrl":"https://doi.org/10.1109/IEMECONX.2019.8877093","url":null,"abstract":"Landmark localization is a very important step for many face-related computer vision applications. Compare to the holistic approaches (e.g. AAMs), constrained local models (CLMs) shows good performance for landmark localization in non-rigid facial images. But these methods are always limited by the initialization. This paper proposed an eye center guided constrained local model where the initialization is performed by mean face shape taking eyes as references. First, we have adopted a hybrid eye detector method to find both the eye centers and then mean face shape is placed on the basis of orientation and distance of two eye centers. Moreover, we have analyzed our models with some descriptors to find the best descriptor to represent our model. The proposed CLM approach has been tested on AR and Multi-PIE databases with 130 and 68 landmarks respectively. The experimental results suggest that our proposed method has achieved improved performance as compared to existing methods.","PeriodicalId":358845,"journal":{"name":"2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)","volume":" 22","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113950112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
High Throughput Architecture for KLEIN Block Cipher in FPGA 基于FPGA的KLEIN分组密码高吞吐量结构
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON) Pub Date : 2019-03-01 DOI: 10.1109/IEMECONX.2019.8877021
Pulkit Singh, B. Acharya, R. Chaurasiya
{"title":"High Throughput Architecture for KLEIN Block Cipher in FPGA","authors":"Pulkit Singh, B. Acharya, R. Chaurasiya","doi":"10.1109/IEMECONX.2019.8877021","DOIUrl":"https://doi.org/10.1109/IEMECONX.2019.8877021","url":null,"abstract":"In recent times, lightweight cryptographic algorithms have drawn a lot of attention to the researchers for securing the fast and small-computing devices. However, different algorithms have been developed to fulfill the requirements, and there has not been much research on transforming these algorithms to Field Programmable Gate Arrays (FPGAs) with minimal optimization. These reprogrammable devices are highly attractive options for hardware implementations of encryption algorithms. A strong focus is placed on high-throughput implementations, which are required to support security for current and future high bandwidth applications. In this paper, two different architectures are designed for resource-constrained environments. Among them, parallel processing implementation achieves high throughput of 2070.39 and 1646.12 Mbps on xc5vlx50t-3ff1136 and xc4vlx25-12ff668 devices, respectively. While in the other design, 8-bits datapath architecture signifies the use for low I/O port devices. All results are simulated and verified for different devices of Xilinx Spartan & Virtex families.","PeriodicalId":358845,"journal":{"name":"2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129865332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
PMSG based WECS with MPPT via modified P&O algorithm 基于改进P&O算法的PMSG wcs与MPPT
2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON) Pub Date : 1900-01-01 DOI: 10.1109/IEMECONX.2019.8876994
N. Verma, Sandeep Banerjee, Sanchit Gupta, Siddharth Goyal, Rahul Sharma
{"title":"PMSG based WECS with MPPT via modified P&O algorithm","authors":"N. Verma, Sandeep Banerjee, Sanchit Gupta, Siddharth Goyal, Rahul Sharma","doi":"10.1109/IEMECONX.2019.8876994","DOIUrl":"https://doi.org/10.1109/IEMECONX.2019.8876994","url":null,"abstract":"Gearless wind energy conversion system based supplies can be a long term solution in case of distributed generation. This paper validates a modified control algorithm for maximum power point tracking of Permanent magnet synchronous generator (PMSG) based wind energy conversion system. This work aims to optimize the losses by extracting maximum wind energy. Permanent Magnet Synchronous Generator is used as it provides gear free mechanism, low noise and it’s easy to control. DC-DC boost converter has been used for implementing MPPT by controlling the duty ratio. This ensures effective utilization of wind energy. In this work the instantaneous values of input side current and voltage are used for implementing MPPT. Modified (P&O) algorithm is used which is more efficient as compared to its traditional counterpart. It reduces the problem of unsettlement around the peak point. The whole work is verified in MATLAB/ Simulink environment by carrying out simulation for the proposed work.","PeriodicalId":358845,"journal":{"name":"2019 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON)","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129892860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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