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2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems最新文献

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Dual-band millimeter-wave VCO with embedded RF-MEMS switch module in BiCMOS technology 双频毫米波压控振荡器，在BiCMOS技术中嵌入RF-MEMS开关模块
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160137
Gang Liu, M. Kaynak, T. Purtova, A. Ulusoy, B. Tillack, H. Schumacher
{"title":"Dual-band millimeter-wave VCO with embedded RF-MEMS switch module in BiCMOS technology","authors":"Gang Liu, M. Kaynak, T. Purtova, A. Ulusoy, B. Tillack, H. Schumacher","doi":"10.1109/SIRF.2012.6160137","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160137","url":null,"abstract":"This paper presents a dual-band millimeter-wave VCO utilizing RF-MEMS switches fully integrated into a standard BiCMOS process. The switch and associated transmission line form a reconfigurable inductor in the VCO core. Depending on the state of the switch, the VCO frequency can be tuned either from 48 to 52 GHz, or from 64 to 72 GHz. The VCO provides both fundamental and frequency-divided (divide by 64) outputs, with integrated frequency dividers. The fundamental output power is 4/5 dBm and the phase noise at 1 MHz offset is -84/-86 dBc/Hz for the lower/upper bands. To the authors' knowledge, this is the first millimeter-wave, dual-band VCO with fully integrated RF-MEMS switches.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132497127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion 用于高动态范围光子模拟-数字转换的集成-转储接收器
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160158
T. D. Gathman, J. Buckwalter
{"title":"An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion","authors":"T. D. Gathman, J. Buckwalter","doi":"10.1109/SIRF.2012.6160158","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160158","url":null,"abstract":"A high-linearity integrate-and-dump circuit is proposed for the electrical interface to a photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s with a 500ps period for integration, hold, and reset. Better than 7.5 ENOB is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology with a core current consumption of 84 mA from a 5 V supply.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129714230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A comparison of intermodulation distortion performance of HICUM and VBIC compact models for pnp SiGe HBTs on SOI 基于SOI的pnp SiGe hbt中HICUM和VBIC紧凑模型的互调失真性能比较
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160117
S. Seth, J. Cressler, J. Babcock, G. Cestra, T. Krakowski, Jin Tang, A. Buchholz
{"title":"A comparison of intermodulation distortion performance of HICUM and VBIC compact models for pnp SiGe HBTs on SOI","authors":"S. Seth, J. Cressler, J. Babcock, G. Cestra, T. Krakowski, Jin Tang, A. Buchholz","doi":"10.1109/SIRF.2012.6160117","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160117","url":null,"abstract":"This paper presents the characterization of intermodulation distortion in pnp SiGe HBTs on SOI. For the first time, measured results of pnp SiGe HBTs are compared against Spectre-based simulations using both HICUM and VBIC compact models, after the systematic selection of the appropriate corner models. It is shown that the HICUM model more accurately captures distortion effects than the VBIC model, across a wide range of collector voltages and currents. HICUM is also superior in modeling large-signal nonlinearities such as gain-compression. These results have clear implications for the best-practice design of distortion-sensitive high-frequency SiGe analog and RF circuits.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114452921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A CMOS fully integrated antenna array transmitter with on-chip skew and pulse-delay adjustment for millimeter-wave active imaging 一种CMOS全集成天线阵列发射机，具有片上偏斜和毫米波有源成像的脉冲延迟调整
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160123
N. Khanh, M. Sasaki, K. Asada
{"title":"A CMOS fully integrated antenna array transmitter with on-chip skew and pulse-delay adjustment for millimeter-wave active imaging","authors":"N. Khanh, M. Sasaki, K. Asada","doi":"10.1109/SIRF.2012.6160123","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160123","url":null,"abstract":"A fully-integrated 8-antenna array transmitter in 65-nm CMOS for short range and portable millimeter-wave (mm-wave) active imaging applications is presented. Each of 8 resistor-less pulse generators (PG) are connected to an on-chip dipole-patch antenna and to a 7-bit digitally programmable delay circuit (DPDC). A 20-bit on-chip jitter and relative skew measuring circuit is also implemented to dynamically calibrate pulse delays for the purpose of beamforming. On-chip skew measurement for eight antenna clocks is performed so that the DPDC's input codes align eight antennas' output pulses. Experimental results of on-chip relative pulse delay calibration and radiation patterns show that beamforming angles of the fully integrated antenna array can be calibrated by digital input codes and the on-chip skew adjustment circuit for active imaging applications.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"357 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122717899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
CMOS integrated antenna-coupled field-effect-transistors for the detection of 0.2 to 4.3 THz CMOS集成天线耦合场效应晶体管，用于检测0.2至4.3太赫兹
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160142
S. Boppel, A. Lisauskas, D. Seliuta, L. Minkevičius, L. Kasalynas, G. Valušis, V. Krozer, H. Roskos
{"title":"CMOS integrated antenna-coupled field-effect-transistors for the detection of 0.2 to 4.3 THz","authors":"S. Boppel, A. Lisauskas, D. Seliuta, L. Minkevičius, L. Kasalynas, G. Valušis, V. Krozer, H. Roskos","doi":"10.1109/SIRF.2012.6160142","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160142","url":null,"abstract":"Distributed phenomena permit the use of field-effect transistors for the detection of frequencies far beyond transistor cut-off. This contribution gives details on an improved design for patch antenna-coupled field-effect-transistors and shows sensitive detection from 0.2 to 4.3 THz for monolithically integrated devices relying on commercial 0.15-μm CMOS process technology. Room-temperature responsivity values of 1344 V/W at 585 GHz, 90 V/W at 3.1 THz and 11 V/W at 4.3 THz are reported (values acquired at optimum operational point). A minimum optical noise-equivalent-power (NEP) of 163 pW/√Hz at 3.1 THz is reported (All values are normalized to the physical antenna area).","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121411923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
High frequency noise potentialities of reported CMOS 65 nm SOI technology on flexible substrate 已报道的CMOS 65nm SOI技术在柔性衬底上的高频噪声潜力
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160147
Y. Tagro, A. Lecavelier des Etangs-Levallois, L. Poulain, S. Lépilliet, D. Gloria, C. Raynaud, E. Dubois, F. Danneville
{"title":"High frequency noise potentialities of reported CMOS 65 nm SOI technology on flexible substrate","authors":"Y. Tagro, A. Lecavelier des Etangs-Levallois, L. Poulain, S. Lépilliet, D. Gloria, C. Raynaud, E. Dubois, F. Danneville","doi":"10.1109/SIRF.2012.6160147","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160147","url":null,"abstract":"In this paper, high frequency (HF) noise performance of 65nm SOI n-MOSFETs, initially fabricated on rigid substrate and subsequently reported on flexible substrate (plastic), is presented for the first time. AC and noise performance is extracted from S-parameters measurements performed up to 110 GHz and noise measurements in 6-40 GHz frequency range, respectively. Almost no degradation has been observed between the S parameters measured on SOI rigid 65 nm transistors (referred as Rigid SOI-MOS) and the same thinned transistors transfer-bonded on a flexible substrate (referred to as Flex SOI-MOS). For Flex SOI-MOS, a minimum noise figure (NFmin) as low as 1.1 dB is achieved at 20 GHz, along with an associated gain (Ga) of 14.5 dB, when the transistor is biased at Vds=1.2V and Ids=270 mA/mm: so far, this performance constitutes the best reported one for flexible electronics.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115408878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A highly efficient 1-Watt broadband class-J SiGe power amplifier at 700MHz 700MHz的高效率1瓦宽带j类SiGe功率放大器
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160139
R. Wu, J. Lopez, Yan Li, D. Lie
{"title":"A highly efficient 1-Watt broadband class-J SiGe power amplifier at 700MHz","authors":"R. Wu, J. Lopez, Yan Li, D. Lie","doi":"10.1109/SIRF.2012.6160139","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160139","url":null,"abstract":"In this paper, the design and measurement results of a highly efficient 1-Watt broadband class J SiGe power amplifier (PA) at 700 MHz are reported. Comparisons between a class J PA and a traditional class AB/B PA have been made, first through theoretical analysis in terms of load network, efficiency and bandwidth behavior, and secondly by bench measurement data. A single-ended power cell is designed and fabricated in the 0.35 μm IBM 5PAe SiGe BiCMOS technology with through-wafer-vias (TWVs). Watt-level output power with greater than 50% efficiency is achieved on bench across a wide bandwidth of 500 MHz to 900 MHz for the class J PA (i.e., >;57% bandwidth at the center frequency of 700 MHz). Psat of 30.9 dBm with 62% collector efficiency (CE) at 700 MHz is measured while the highest efficiency of 68.9% occurs at 650 MHz using a 4.2 V supply. Load network of this class J PA is realized with lumped passive components on a FR4 printed circuit board (PCB). A narrow-band class AB PA counterpart is also designed and fabricated for comparison. The data suggests that the broadband class J SiGe PA can be promising for future multi-band wireless applications.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115143108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
On Gm-boosting and cyclostationary noise mechanisms in low-voltage CMOS differential Colpitts VCOs 低压CMOS差分柯氏压控振荡器的gm升压和周期平稳噪声机制研究
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160136
A. Koukab, O. Amiri
{"title":"On Gm-boosting and cyclostationary noise mechanisms in low-voltage CMOS differential Colpitts VCOs","authors":"A. Koukab, O. Amiri","doi":"10.1109/SIRF.2012.6160136","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160136","url":null,"abstract":"This paper presents a theoretical study of CMOS differential Colpitts VCOs. The objective is to provide a deep understanding of the different mechanisms that impact the performances of these VCOs, namely the Gm-boosting and cyclostationary noise. The developed methodology and expressions can be used to analyze, optimize and build new VCO topologies. A novel topology with an optimized gate to source (GS) feedback is proposed. It exhibits a figure of merit (FOM) better than -190 dBc/Hz/mW for all the frequency offsets.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121819530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Highly linear robust RF switch with low insertion loss and high power handling capability in a 65nm CMOS technology 高线性鲁棒RF开关，具有低插入损耗和高功率处理能力，采用65nm CMOS技术
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160157
J. Rascher, S. Pinarello, J. Mueller, G. Fischer, R. Weigel
{"title":"Highly linear robust RF switch with low insertion loss and high power handling capability in a 65nm CMOS technology","authors":"J. Rascher, S. Pinarello, J. Mueller, G. Fischer, R. Weigel","doi":"10.1109/SIRF.2012.6160157","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160157","url":null,"abstract":"This work reports on the considerations for building RF switches in deeply scaled CMOS. As demonstrator single pole single throw (SPST) switches in a standard 65 nm technology are designed and measured. Goal of this design is lowest insertion loss while achieving high power handling capability, linearity, and robustness. For the novel design of switch variant Dev 1 0.8dB of insertion loss, 30dBm of power handling and an input third order intermodulation intercept point (iIP3) of 48.8 dBm has been achieved at 1.8 GHz. High robustness is achieved by stacking 4 transistors. Isolation at 1.8 GHz is better than 22dB. For high power handling capability in off state a method is implemented to rise the DC voltage level at inner nodes of the switch. Thus the threshold voltage lowering in deeply scaled CMOS can be counteracted. The small and large signal behaviour of the switch is compared to conventional designs and benefits are proven.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114130735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Effect of arsenic and phosphorus doping on polysilicon resistor noise and TCR 砷磷掺杂对多晶硅电阻器噪声和TCR的影响
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2012-03-01 DOI: 10.1109/SIRF.2012.6160161
J. Kim, Jung-Joo Kim, Kyu-Ok Lee, C. Lee, Jong-Ho Lee, Dong‐Seok Kim, Nam-Joo Kim, K. Yoo
{"title":"Effect of arsenic and phosphorus doping on polysilicon resistor noise and TCR","authors":"J. Kim, Jung-Joo Kim, Kyu-Ok Lee, C. Lee, Jong-Ho Lee, Dong‐Seok Kim, Nam-Joo Kim, K. Yoo","doi":"10.1109/SIRF.2012.6160161","DOIUrl":"https://doi.org/10.1109/SIRF.2012.6160161","url":null,"abstract":"Flicker (1/f) noise and TCR are compared for arsenic- and phosphorus-doped polysilicon in a 0.18 μm CMOS base technology. Resistors implanted with arsenic exhibit about 4 times higher noise than with phosphorus at the same dose and thermal budget. The TCR of arsenic-doped polysilicon is negative, near -1065 ppm/K, while that of phosphorus-doped resistors positive, about + 590 ppm/K. The mismatch of N-channel MOSFETs with arsenic-doped gates is about 40% lower than with phosphorus gates. The results are attributed to the difference in grain-size and dopant segregation. The difference in grain size is confirmed by TEM and SEM micrographs.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130962734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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