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Intelligent Memory Systems最新文献

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Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler 在VIRAM编译器中利用片上内存带宽
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_8
D. Judd, K. Yelick, C. Kozyrakis, David R. Martin, D. Patterson
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引用次数: 13
Content-Based Prefetching: Initial Results 基于内容的预取:初始结果
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_3
Robert Cooksey, Dennis Colarelli, D. Grunwald
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引用次数: 12
Compiler-Directed Cache Line Size Adaptivity 编译器导向的缓存行大小适应性
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_15
D. Nicolaescu, Xiaomei Ji, A. Veidenbaum, A. Nicolau, Rajesh K. Gupta
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引用次数: 10
A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro 一个64兆中时混合波流水线多组DRAM宏
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_1
J. Ogawa, M. Horowitz
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引用次数: 1
Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips 内存中处理器芯片内存层次的能量/性能设计
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_11
Michael C. Huang, Jose Renau, Seung-Moon Yoo, J. Torrellas
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引用次数: 6
Memory Management in a PIM-Based Architecture 基于pim架构中的内存管理
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_7
Mary W. Hall, C. Steele
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引用次数: 8
The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems 分布式PIM系统中数据密集型内存工作负载的表征
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_6
R. Murphy, P. Kogge, Arun Rodrigues
{"title":"The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems","authors":"R. Murphy, P. Kogge, Arun Rodrigues","doi":"10.1007/3-540-44570-6_6","DOIUrl":"https://doi.org/10.1007/3-540-44570-6_6","url":null,"abstract":"","PeriodicalId":226779,"journal":{"name":"Intelligent Memory Systems","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122448158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
The DIVA Emulator: Accelerating Architecture Studies for PIM-Based Systems DIVA仿真器:加速基于pim系统的体系结构研究
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_14
Jeff La Coss
{"title":"The DIVA Emulator: Accelerating Architecture Studies for PIM-Based Systems","authors":"Jeff La Coss","doi":"10.1007/3-540-44570-6_14","DOIUrl":"https://doi.org/10.1007/3-540-44570-6_14","url":null,"abstract":"","PeriodicalId":226779,"journal":{"name":"Intelligent Memory Systems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123388708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Aggressive Memory-Aware Compilation 主动内存感知编译
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_10
P. Grun, N. Dutt, A. Nicolau
{"title":"Aggressive Memory-Aware Compilation","authors":"P. Grun, N. Dutt, A. Nicolau","doi":"10.1007/3-540-44570-6_10","DOIUrl":"https://doi.org/10.1007/3-540-44570-6_10","url":null,"abstract":"","PeriodicalId":226779,"journal":{"name":"Intelligent Memory Systems","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114878333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Software Controlled Reconfigurable On-Chip Memory for High Performance Computing 用于高性能计算的软件控制可重构片上存储器
Intelligent Memory Systems Pub Date : 2000-11-12 DOI: 10.1007/3-540-44570-6_2
Hiroshi Nakamura, Masaaki Kondo, T. Boku
{"title":"Software Controlled Reconfigurable On-Chip Memory for High Performance Computing","authors":"Hiroshi Nakamura, Masaaki Kondo, T. Boku","doi":"10.1007/3-540-44570-6_2","DOIUrl":"https://doi.org/10.1007/3-540-44570-6_2","url":null,"abstract":"","PeriodicalId":226779,"journal":{"name":"Intelligent Memory Systems","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116589062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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