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Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.最新文献

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Behavioral macromodels of differential drivers with pre-emphasis 具有预强调的差异驱动因素的行为宏观模型
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500921
I. Stievano, I. Maio, E. G. Canavero, C. Siviero
{"title":"Behavioral macromodels of differential drivers with pre-emphasis","authors":"I. Stievano, I. Maio, E. G. Canavero, C. Siviero","doi":"10.1109/SPI.2005.1500921","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500921","url":null,"abstract":"This paper addresses the extension of the behavioral modeling via parametric relations to differential drivers with pre-emphasis. These devices are of paramount importance to enable multi-gigabit data transmission over conventional copper interconnects. The proposed models preserve the accuracy and efficiency strengths of behavioral parametric macromodels for conventional devices. Their operation is demonstrated in a realistic simulation example involving a 3.125 Gb/s commercial driver with pre-emphasis.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129978778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Substrate loss of on-chip transmission-lines with power/ground wires in lower layer 底层有电源线/地线的片上传输线的衬底损耗
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500944
A. Tsuchiya, M. Hashimoto, H. Onodera
{"title":"Substrate loss of on-chip transmission-lines with power/ground wires in lower layer","authors":"A. Tsuchiya, M. Hashimoto, H. Onodera","doi":"10.1109/SPI.2005.1500944","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500944","url":null,"abstract":"This paper discusses shielding effect of power/ground wires in lower layer. A conducting substrate affects characteristics of on-chip transmission line. However in many cases on actual chips, there are P/G wires between the signal wire and the substrate that may shield the substrate coupling. We show measurement and simulation results of on-chip transmission-lines with narrow yet many power/ground wires in a lower layer. Experimental results show that narrow power/ground wires in a lower layer in parallel to the signal wire, which are common in LSI power distribution network, shield substrate coupling and suppress substrate loss. On the other hand, orthogonal power/ground wires in a lower layer hardly mitigate substrate coupling.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117330588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis of interconnects in huge frequency ranges with a 3-D superficial integral formulation 用三维表面积分公式分析大频率范围内的互连
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500908
A. Chiariello, A. Maffucci, G. Miano, F. Villone, W. Zamboni
{"title":"Analysis of interconnects in huge frequency ranges with a 3-D superficial integral formulation","authors":"A. Chiariello, A. Maffucci, G. Miano, F. Villone, W. Zamboni","doi":"10.1109/SPI.2005.1500908","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500908","url":null,"abstract":"A general method is proposed to analyze interconnects with perfect conductors and homogeneous dielectrics, which is valid from zero frequency to microwave frequencies. In this method, facet elements have been used to represent the current density field. To overcome the low-frequency breakdown problem, the divergence-free and non divergence-free components of the current density field are separated by using the null and pseudo inverse of the matrix approximating the divergence operator.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115064395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Causality enforcement in transient simulation of passive networks through delay extraction 基于时延提取的无源网络暂态仿真中的因果关系强化
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500884
Rohan Mandrekar, Madhavan SwaminathanZ
{"title":"Causality enforcement in transient simulation of passive networks through delay extraction","authors":"Rohan Mandrekar, Madhavan SwaminathanZ","doi":"10.1109/SPI.2005.1500884","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500884","url":null,"abstract":"Causality, which deals with the precise timing of signal propagation through passive structures like interconnects, is an important problem in the time domain simulation of distributed passive networks. If unaccounted for, it can lead to significant error in the signal integrity analysis of high-speed digital systems. This paper demonstrates the enforcement of causality on the transient simulation of distributed passive networks based on the extraction of the port-to-port delay. The paper describes a technique to extract the port-to-port delay in passive networks directly from their frequency domain response. The technique can be applied to either S, Y or Z parameters of passive networks and can be extended to multi-port and mixed mode networks.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128260362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 46
Respective parts of capacitive and inductive coupling 电容耦合和电感耦合各部分
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500934
D. Deschacht
{"title":"Respective parts of capacitive and inductive coupling","authors":"D. Deschacht","doi":"10.1109/SPI.2005.1500934","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500934","url":null,"abstract":"Rapid progress in integrated circuit technology has led to an increase in the switching speed of the digital chip. As a result, there is a growing interest in the inductance associated with signal lines. In this paper we show the influence of inductance on crosstalk voltage by considering a configuration of two parallel coupled interconnects. For a typical DSM (deep-sub-micron) geometry structure for data buses, we show that when standard distributed RC models are used and inductive effects are ignored, large errors can occur in the prediction and evaluation of the crosstalk voltage. This is all the more important because the inductance effect will increase as technologies downscale. For our structure, the inductive part of crosstalk can reach 30% when the input transition time at the beginning of the aggressor line is 50ps. The sensibility of inductances values, including self and mutual inductances are then analysed.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133535713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Causality check for SI data validation SI数据验证的因果关系检查
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500932
G. Antonini, A. Orlandi, V. Ricchiuti
{"title":"Causality check for SI data validation","authors":"G. Antonini, A. Orlandi, V. Ricchiuti","doi":"10.1109/SPI.2005.1500932","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500932","url":null,"abstract":"In this paper the Hilbert transform is used as tool to assess the consistency of measured or numerically computed network transfer functions with respect the causality conditions. Different implementation of the Hilbert transform are shown, discussed and applied to scattering parameters datasets characterizing passive structures on printed circuit boards.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116342845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
ASEAN-EU University Network Programme on EMC and SI education 东盟-欧盟大学网络EMC和科学技术教育计划
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500949
F. Canavero, C. Christopoulos, H. Grabinski, S. K. Yak, W. Khan-ngern
{"title":"ASEAN-EU University Network Programme on EMC and SI education","authors":"F. Canavero, C. Christopoulos, H. Grabinski, S. K. Yak, W. Khan-ngern","doi":"10.1109/SPI.2005.1500949","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500949","url":null,"abstract":"This paper reports about a project for the creation of an innovative university course devoted to the preparation of future electronic designers to the challenges imposed by the assurance of the electrical performance of high-speed electronic systems. The target groups are future university teaching staff and future electronic systems designers. Activities are developed by means of sharing research results, seminars, experience exchange and the development of demonstrators to be used for teaching. The partnership is composed by Technical University of Turin (Italy), University of Hannover (Germany), University of Nottingham (UK), Nanyang Technological University (Singapore) and King Monguts Institute of Technology Lad-krabang, Bangkok (Thailand). The program is partially funded by the European Commission under the ASEAN-EU University Network Programme (AUNP) and its duration is 24 months.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123296527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On the analysis of four symmetrical interconnects for signal integrity evaluation 四种对称互连的信号完整性评估分析
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500928
F. Ponchel, J. Legier, E. Paleczny, C. Seguinot, D. Deschacht
{"title":"On the analysis of four symmetrical interconnects for signal integrity evaluation","authors":"F. Ponchel, J. Legier, E. Paleczny, C. Seguinot, D. Deschacht","doi":"10.1109/SPI.2005.1500928","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500928","url":null,"abstract":"The purpose of this paper is to explain the way used to determine the electrical frequency dependant equivalent circuit of four coupled interconnects located on the same level. This is done with a full wave finite element method in one way, and the analysis of four symmetrical lines with the telegrapher transmission line equation and coupled mode theory in another way. Once the equivalent R/sub i/, L/sub i/, G/sub i/, Q/sub i/, Z/sub ij/,Y/sub ij/ circuit is determined for SPICE model, signal integrity is analyzed when the victim line is, for example, separated from the aggressive one by two and three interconnects.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125267329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Computer code for passivity enforcement of rational macromodels 理性宏模型的被动执行的计算机代码
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500916
B. Gustavsen
{"title":"Computer code for passivity enforcement of rational macromodels","authors":"B. Gustavsen","doi":"10.1109/SPI.2005.1500916","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500916","url":null,"abstract":"This paper describes a public domain routine QPpassive.m for passivity enforcement of rational multi-port macromodels using constrained least squares approximation. The procedure calculates a correction to the original macromodel by adjusting the residues and constant term as a postprocessing step while minimizing the resulting change in the frequency domain. The code allows to reduce the computation time by limiting the number of free variables in the constraint problem. Different constraint types and weighting schemes are available.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126917424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Time domain approach for the evaluation of RC delays effects in ULSI interconnect lines 时域方法评估ULSI互连线RC延迟效应
Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005. Pub Date : 2005-05-10 DOI: 10.1109/SPI.2005.1500925
L. Vendrame, L. Bortesi, M. Biasio, G. Meneghesso
{"title":"Time domain approach for the evaluation of RC delays effects in ULSI interconnect lines","authors":"L. Vendrame, L. Bortesi, M. Biasio, G. Meneghesso","doi":"10.1109/SPI.2005.1500925","DOIUrl":"https://doi.org/10.1109/SPI.2005.1500925","url":null,"abstract":"The evaluation of RC effects in ULSI technology is important both for process development and for accuracy verification of back-end modeling and cad-tools. The paper proposes a new methodology with one possible implementation for the measurement of RC delays in ULSI interconnect lines (DUT). The proposed implementation has been developed at wafer level by means of a mid-complexity test circuit whose working principle is based on the comparison between the RC delay of the DUT and a well-known reference delay generated on-chip.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126624579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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