2008 IEEE Workshop on Signal Processing Systems最新文献_第4页

Multi-mode sub-Nyquist rate digital-to-analog conversion for direct waveform synthesis 用于直接波形合成的多模次奈奎斯特速率数模转换

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671747

Stanley Yuan-Shih Chen, Nam-Seog Kim, J. Rabaey

引用次数: 11

Error correction for multi-level NAND flash memory using Reed-Solomon codes 纠错多级NAND闪存使用里德-所罗门码

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671744

Bainan Chen, Xinmiao Zhang, Zhongfeng Wang

引用次数: 106

SmartCell: A power-efficient reconfigurable architecture for data streaming applications SmartCell:用于数据流应用的节能可重构架构

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671772

C. Liang, Xinming Huang

引用次数: 29

The support of software design patterns for streaming RPC on embedded multicore processors 在嵌入式多核处理器上支持流RPC的软件设计模式

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671773

Kun-Yuan Hsieh, Yen-Chih Liu, Chi-Hua Lai, Jenq-Kuen Lee

{"title":"The support of software design patterns for streaming RPC on embedded multicore processors","authors":"Kun-Yuan Hsieh, Yen-Chih Liu, Chi-Hua Lai, Jenq-Kuen Lee","doi":"10.1109/SIPS.2008.4671773","DOIUrl":"https://doi.org/10.1109/SIPS.2008.4671773","url":null,"abstract":"The development of embedded system has been toward the multicore architectures in the recent years. It raises concerns in the community of supporting programming models and languages to derive maximal performance from the architectures. Among the diversity of models for programming multicore processors, remote procedure call (RPC) is one of the most relevant programming techniques for supporting an explicit parallel programming model. Although such promising programming technique provides an easy way of modeling the applications on multiple processors, it remains an interesting and challenging problem of how to provide an effective system of programming data-intensive applications under the programming scenario of RPC. In this paper, we propose a streaming mechanism called streaming RPC to provide a system for modeling data-intensive and stream-based applications to efficiently utilize the constituents of the multicore processors. Streaming RPC is based on the framework of RPC and implemented as a middleware support to provide a library-based programming model with parallelism by mandatory. We also propose design patterns for the streaming mechanism and present experiences of developing high performance multimedia applications. Experimental results show that our streaming RPC framework is efficient to support multicore programming for multimedia applications.","PeriodicalId":173371,"journal":{"name":"2008 IEEE Workshop on Signal Processing Systems","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134640963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A digit-serial architecture for inversion and multiplication in GF(2M) GF(2M)的数字串行反演和乘法体系结构

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671729

Junfeng Fan, I. Verbauwhede

引用次数: 10

Efficient image reconstruction using partial 2D Fourier transform 利用部分二维傅里叶变换有效的图像重建

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671736

L. Deng, Chi-Li Yu, C. Chakrabarti, Jungsub Kim, N. Vijaykrishnan

引用次数: 8

Validation of bitstream syntax and synthesis of parsers in the MPEG Reconfigurable Video Coding framework MPEG可重构视频编码框架中码流语法的验证和解析器的合成

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671778

M. Raulet, J. Piat, Christophe Lucarz, M. Mattavelli

{"title":"Validation of bitstream syntax and synthesis of parsers in the MPEG Reconfigurable Video Coding framework","authors":"M. Raulet, J. Piat, Christophe Lucarz, M. Mattavelli","doi":"10.1109/SIPS.2008.4671778","DOIUrl":"https://doi.org/10.1109/SIPS.2008.4671778","url":null,"abstract":"Video coding technology has evolved in the past years into a variety of different and complex algorithms. So far the specification of such standard algorithms has been done case by case providing monolithic textual and reference SW specifications, but without any attention on commonalities and the possibility of incremental improvements or modifications of such monolithic standards. The MPEG Reconfigurable Video Coding (RVC) framework is a new ISO standard, currently under development aiming at providing video codec specifications at the level of library functions instead of monolithic algorithms. The possibility to select a subset of standard coding algorithms to specify a decoder that satisfies application specific constraints is very attractive. However, such possibility to reconfigure codecs requires systematic procedures and tools capable of describing the new bitstream syntaxes of such new codecs. Moreover, it is also necessary to generate the associated parsers which are capable to parse the new bitstreams because they are not available ldquoa priorirdquo in the RVC library. This paper further explains the problem and describes the technologies used to describe new bitstream syntaxes within RVC. In addition, the paper describes the methodology and the tools for the validation of bitstream syntaxes descriptions as well as an example of systematic procedures for the direct synthesis of parsers in the same data flow formalism in which the RVC library component are implemented.","PeriodicalId":173371,"journal":{"name":"2008 IEEE Workshop on Signal Processing Systems","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124039570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Hardware acceleration for tracking by computing low-order geometric moments 通过计算低阶几何矩实现跟踪的硬件加速

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671735

J. Vijverberg, P. D. With

引用次数: 5

Efficient data flow variable length decoding implementation for the MPEG reconfigurable video coding framework MPEG可重构视频编码框架的高效数据流变长解码实现

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671760

Jianjun Li, Dandan Ding, Christophe Lucarz, S. Keller, M. Mattavelli

引用次数: 6

Trade-off analysis of decoding algorithms and architectures for multi-standard LDPC decoder 多标准LDPC解码器译码算法与架构的权衡分析

2008 IEEE Workshop on Signal Processing Systems Pub Date : 2008-11-17 DOI: 10.1109/SIPS.2008.4671743

R. Priewasser, M. Huemer, B. Bougard

引用次数: 4