2023 IEEE 24th Latin American Test Symposium (LATS)最新文献

Abstractions for Modeling the Effects of Wall Surface Roughness in Silicon Photonic Microring Resonators 硅光子微环谐振腔壁面粗糙度影响的建模

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154479

Pratishtha Agnihotri, Lawrence M. Schlitt, P. Kalla, S. Blair

{"title":"Abstractions for Modeling the Effects of Wall Surface Roughness in Silicon Photonic Microring Resonators","authors":"Pratishtha Agnihotri, Lawrence M. Schlitt, P. Kalla, S. Blair","doi":"10.1109/LATS58125.2023.10154479","DOIUrl":"https://doi.org/10.1109/LATS58125.2023.10154479","url":null,"abstract":"Microring resonators (MRRs) are one of the key components of many on-chip optical interconnect wavelength-division multiplexing (WDM) network architectures, often fab-ricated in Silicon Photonics. The operation of these devices is extremely sensitive to variations in the fabrication process. Wall surface roughness (WSR) is one such process variation that affects MRR's performance. Analyzing the effect of WSR on MRR's performance requires full-scale FDTD simulations, which is costly for testing and validation of silicon photonic circuits. This paper proposes an abstract mathematical model to estimate the impact of WSR on the shift in the resonant wavelength of MRRs. We show that WSR can be approximated using a quasi-grating - in particular, a “notch perturbation” in the ring waveguide. Since the effect of notches can be described using the well understood perturbation theory, analysis of the effect of WSR using notches can be performed using eigenmode solvers. Experiments depict that our abstraction is quite accurate to full-scale FDTD simulations, but is orders of magnitude faster.","PeriodicalId":145157,"journal":{"name":"2023 IEEE 24th Latin American Test Symposium (LATS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115573247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

SSSN: Secured Streaming Scan Network SSSN:安全流扫描网络

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154483

Sonali Shukla, Bhavika Ranjeet Kumar, Virendra Singh

{"title":"SSSN: Secured Streaming Scan Network","authors":"Sonali Shukla, Bhavika Ranjeet Kumar, Virendra Singh","doi":"10.1109/LATS58125.2023.10154483","DOIUrl":"https://doi.org/10.1109/LATS58125.2023.10154483","url":null,"abstract":"During last decade, IEEE standard 1687 or IJTAG has been utilized to test the embedded instruments on chips that support test and measurement applications. Recently, IJTAG has been incorporated into the newly developed testing architecture referred as a Streaming Scan Network (SSN) for efficient testing of the complex System-on-Chips (SoCs). IJTAG registers are used to configure the components of a Streaming Scan Host (SSH) node associated with each core in the SSN network. SSN supports packetized test data distribution for streaming of the test data through SSN bus. SSN provides efficient SoC testing by several times reduction in test time and test data volume with limited pin count. Although SSN outshines in providing testing benefits, it lacks security support. An unauthorized user can maliciously modify the configuration registers and extracts sensitive information. Presence of untrusted modules in the network also amplifies the security concerns as each packet may contain test data of multiple cores. Hence, an untrusted cores can simply sniff the data destined for other cores. Therefore, to address the security issues in SSN test architecture, one needs to protect the system against internal untrusted third-party intellectual property (3PIP) modules and unauthorized users. This work discusses the security vulnerabilities of SSN architecture by demonstrating an attack scenario. Keeping the flexibility of SSN intact, we propose a modified SSH architecture and an authorization unit to ensure security against data sniffing attacks and unauthorized accesses, respectively. A state-of-the-art scheme is compared against the proposed approach in terms of area overheads. Thus, this paper presents a multi-level methodology with very low area and testing overheads for secure SSN.","PeriodicalId":145157,"journal":{"name":"2023 IEEE 24th Latin American Test Symposium (LATS)","volume":"19 23","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113976939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Low-cost digital solution for production test of ZigBee transmitters Special Session “AMS-RF testing” ZigBee发射机生产测试的低成本数字解决方案专题“AMS-RF测试”

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154484

T. Vayssade, F. Azaïs, L. Latorre, F. Lefèvre

引用次数: 0

Fault Tolerant Architecture Design of a CubeSat Command and Data Handling System 立方体卫星指挥与数据处理系统的容错体系结构设计

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154496

Christopher Lara, Maximiliano Fragoso, Luis Manuel Juárez, L. Barboni, R. Reyes, Ricardo Vázquez, J. P. Acle, S. Rosa

{"title":"Fault Tolerant Architecture Design of a CubeSat Command and Data Handling System","authors":"Christopher Lara, Maximiliano Fragoso, Luis Manuel Juárez, L. Barboni, R. Reyes, Ricardo Vázquez, J. P. Acle, S. Rosa","doi":"10.1109/LATS58125.2023.10154496","DOIUrl":"https://doi.org/10.1109/LATS58125.2023.10154496","url":null,"abstract":"In recent years CubeSat satellite missions have been covering an increasing number of applications with a relatively low-cost budget. In this context, most CubeSat missions use COTS components. Therefore a variety of fault tolerance techniques must be used to obtain the required dependability. This work presents the design methodology that is being followed by the authors in the design of a command and data handling subsystem (C&DH) for CubeSats. The final design of this proposed C&DH subsystem will be included as a secondary payload in the Latin American Satellite Mission, a 3U CubeSat remote sensing mission that will acquire Earth's surface images for use in forestry and agricultural analysis. At the time of writing this paper, a C&DH preliminary version is complete, and a set of fault injection experiments are under development with the goal of identifying and fixing weaknesses in the fault tolerance mechanisms. A review and analysis of C&DH subsystems in recent commer-cial and academic CubeSat projects are presented. As a result of this analysis, a master-supervisor architecture was adopted. The method for estimating the expected rate of SEU and SEFI radiation effects in the planned orbit of the Latin American Satellite Mission is presented, and the adopted master-supervisor architecture is detailed. Finally, a brief description of the planned fault injection experiments is presented.","PeriodicalId":145157,"journal":{"name":"2023 IEEE 24th Latin American Test Symposium (LATS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115168851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Special Session: On-chip jitter BIST with sub-picosecond resolution at GHz frequencies 特别会议:在GHz频率下具有亚皮秒分辨率的片上抖动BIST

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154493

Manasa Madhvaraj, S. Mir, M. Barragán

引用次数: 0

A Fast Reliability Analysis of Image Segmentation Neural Networks Exploiting Statistical Fault Injections 基于统计故障注入的图像分割神经网络快速可靠性分析

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154488

G. Govarini, A. Ruospo, Ernesto Sánchez

{"title":"A Fast Reliability Analysis of Image Segmentation Neural Networks Exploiting Statistical Fault Injections","authors":"G. Govarini, A. Ruospo, Ernesto Sánchez","doi":"10.1109/LATS58125.2023.10154488","DOIUrl":"https://doi.org/10.1109/LATS58125.2023.10154488","url":null,"abstract":"The reliability of hardware running deep neural networks (DNNs) is becoming the object of multiple research works. Fault injections (FIs) are one of the most used solutions to determine the reliability of DNN models. However, defining how many faults to inject in the model is not a trivial task. An exhaustive FI campaign requires injecting, in modern DNNs, billions or trillions of parameters. On the other hand, random FI campaigns do not offer a practical measure of the accuracy of the result. A different approach is to perform a statistical FI: the number of faults to inject is decided based on the number of possible faults and by fixing an error margin and a confidence level on the measured output metric. While the statistical approach offers the best of both worlds, it requires a proper setup to guarantee its statistically significance. In this work, a study on the statistical fault injection procedure on an image segmentation neural network is proposed. In particular, the study compares results from a random FI campaign and an improperly-defined statistical FI campaign, and shows how they fail at highlighting some of the critical aspects of U-Net, a state-of-the-art DNN used for image segmentation. The proposed APPROACH, BY INJECTING ONLY THE 0.07 % OF ALL THE POSSIBLE FAULTS, accurately measures both the criticality of each layer and of the parameters' bit with an error margin of 1 % and a confidence level of 99 %.","PeriodicalId":145157,"journal":{"name":"2023 IEEE 24th Latin American Test Symposium (LATS)","volume":"308 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133635522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning 基于二项式定律和分划的组合网表正确率快速分析

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154491

Esther Goudet, Luis Peña Treviño, L. Naviner, J. Daveau, P. Roche

引用次数: 0

Special Session: A high-frequency sinusoidal signal generation using harmonic cancellation 特别会议:高频正弦信号的产生使用谐波抵消

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154502

Ankush Mamgain, S. Mir, J. N. Tripathi, M. Barragán

引用次数: 0

Co-optimization of security and accessibility to on-chip instruments 芯片上仪器的安全性和可访问性的协同优化

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/LATS58125.2023.10154500

E. Larsson

引用次数: 0

LATS 2023 Committees LATS 2023委员会

2023 IEEE 24th Latin American Test Symposium (LATS) Pub Date : 2023-03-21 DOI: 10.1109/lats58125.2023.10154506

引用次数: 0