{"title":"Test Strategies for minimizing the overall cost of test in moving from “cost based/government furnished equipment” to “firm fixed price” contracts","authors":"D. Lowenstein, J. Lagrotta","doi":"10.1109/AUTEST.2012.6334524","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334524","url":null,"abstract":"As government aerospace defense contracts move to firm fixed price (FFP) and away from cost-based contracts companies are faced with re-structuring the whole product life cycle (PLC) process. Ensuring solid development and manufacturing strategies to meet the new emphasis toward Fixed Firm Price (FFP) procurements is crucial for the financial success of fulfilling the contract. An important aspect to this affordability is the development, implementation and operation of the test process. This paper will explore test strategies that look at maximizing test asset utilization, flexibility and overall cost of test throughout the product life cycle (development, manufacturing and support). It will discuss how developing test strategies that are coordinated between programs can drive affordability and ultimately drive competitive advantages in future contracts.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123466919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Advancing RF test with open FPGAs","authors":"Erik Johnson, R. Verret","doi":"10.1109/AUTEST.2012.6334567","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334567","url":null,"abstract":"The number of wireless devices, diversity of communication standards, and sophistication of modulation schemes are increasing dramatically each year. With each subsequent generation of technology, the cost of testing wireless devices using traditional techniques also has increased. One way to minimize hardware costs and reduce test time is to use virtual or synthetic instruments along with modular I/O; however, a new approach, software-designed instrumentation, not only provides microprocessor software flexibility but an open, user-programmable FPGA for further customization. This approach gives RF test engineers the ability to reduce test times orders of magnitude beyond what was previously possible without custom or standard-specific instrumentation. In this work, we demonstrate how a software-designed RF instrument can include an architecture that facilitates the record-based model of typical virtual or synthetic instruments. We show how this architecture can be extended with simple FPGA modifications to digitally control the device under test (DUT), reducing capital equipment costs by eliminating unnecessary instruments. We achieve a test time reduction of three orders of magnitude in a power leveling algorithm, common in RF power amplifier test. We also show how a software-designed RF instrument can be completely re-architected to implement a real-time RF channel emulator by including complex mathematical fading models on the FPGA. Using this approach, we demonstrate a 2×2 real-time MIMO channel emulator with up to 36 taps per fading filter.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"724 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123850547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Leveraging the cloud to create a network centric support environment for support equipment","authors":"A. Alwardt","doi":"10.1109/AUTEST.2012.6334534","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334534","url":null,"abstract":"The Boeing Company Support Equipment & Services (SES) organization, in partnership with the Army, Ground Marine Corps and Navy, is leveraging the Cloud to create a Network Centric Support Environment for Support Equipment (SE) by developing and deploying the Next Generation Operations Management Software (NxOMS) within the Department of Defense (DoD).","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126418929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automated continuity tester for large wire-wrapped avionics chassis","authors":"P. J. Bryant, T. J. Tillman","doi":"10.1109/AUTEST.2012.6334516","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334516","url":null,"abstract":"In the 1960s and 70s wire wrap circuit construction was very common in electronics manufacturing. Although, its use has fallen out of favor in manufacturing due to surfacemount technology along with high-quality, rapid, and inexpensive professional printed circuit board production, it is still useful for prototyping. As one might imagine, manually testing the continuity of a large, complex wire-wrapped assembly is not only time consuming, but also highly error prone. An example of a sophisticated, but older and extended-lifetime avionics system is the AN/ALQ-161 Defensive Avionics System on the B-1B. Each LRU chassis has a unique wire wrap connectivity scheme. Because of the complexity of the connectivity nets and the fact that each LRU's net list is unique, manual testing was considered unreliable and excessively time consuming for the reasons already mentioned. We present here the system design of an automated chassis wiring tester, emphasizing continuity testing.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121117280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Experimental applications of Automatic Test Markup Language (ATML)","authors":"C. Lansdowne, C. Gorringe, P. McCartney","doi":"10.1109/AUTEST.2012.6334532","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334532","url":null,"abstract":"The authors describe challenging use-cases for Automatic Test Markup Language (ATML), and evaluate solutions. The first case uses ATML Test Results to deliver active features to support test procedure development and test flow, and bridging mixed software development environments. The second case examines adding attributes to Systems Modelling Language (SysML) to create a linkage for deriving information from a model to fill in an ATML document set. Both cases are outside the original concept of operations for ATML but are typical for integrating large heterogeneous systems with modular contributions from multiple disciplines.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122741491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A non-arduous way to do signal routing","authors":"L. Kirkland","doi":"10.1109/AUTEST.2012.6334514","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334514","url":null,"abstract":"There has been much work, re-work, duplicating work, test & find work, mind boggling work and just plain time consuming engineering work performed to accomplish optimal signal routing from the Interface Test Adapter (ITA) to the instrument. Accomplishments and technology improvements often get discarded or overlooked. All too often, the workforce starts at ground zero for every TPS routing scheme. Optimally, it would be beneficial to establish a minimum set of requirements for any given TPS Software Development Environment (SDE) signal routing automation. When new or better techniques are invented and proven then the requirements should be upgraded. At a minimum, the user should be able to enter an Interface Definition where each UUT signal and pin is defined and enter the ITA Database Information by selecting an interface pin for each Unit Under Test (UUT) connection then the SDE should automate the routing. Also, as an option, the user should be able to manually select the routing desired from the ITA to the instrument. This paper will show a non-arduous way or automated way to do signal routing on complex Automatic Test Equipment (ATE) platforms. The paper will present a set of requirements and more or less set an initial standard. Another factor is the SDE output data should be used by the Test Executive to provide the user with all pertinent ATE to UUT routing information. This is extremely beneficial in determining station problems and verifying optimal routing. So, the SDE (coupled with the compiler) and the Test Executive should both handle and present all pertinent information associated with routing.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115801282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Preserving test program set (TPS) performance after legacy automated test equipment (ATE) upgrade","authors":"R. Marion","doi":"10.1109/AUTEST.2012.6334539","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334539","url":null,"abstract":"Legacy ATE typically requires economical obsolescence upgrades ranging from minor to major at various points during its life cycle, due to availability and viability of repair assets. System level replacement costs are generally prohibitive. For mature systems where significant investments in TPS software and hardware have been made, there is substantial incentive to maintain compatibility with legacy operation in order to preserve the cumulative investment in Test Program Set (TPS) assets. The ATE assets may be obsolete for many reasons, but shifts in microcircuit level technology seem to be a recurrent theme. Therefore, the replacement asset may operate significantly different internally than the legacy asset even though it may be advertised as a plug and play replacement. We will follow a major obsolescence upgrade for the Avionics Intermediate Shop (AIS), where three automated stations are being upgraded after more than thirty years in the field. While TPS changes are allowed where absolutely required, we determined that the lowest risk and lowest cost approach was to preserve legacy performance at the asset level where possible. Assets to be replaced include the computer, display, printer, digital multimeter, frequency counter, waveform digitizer, spectrum analyzer, waveform generators, synchro generator, synchro receiver, digitizer calibrator, pneumatic controller and pneumatic pump. The legacy computer precedes the microprocessor era and does not employ standardized word sizes, which presents some interesting design challenges. The computer communicates via custom designed buses, mostly clocked serial although parallel direct memory address (DMA) buses were used for critical high throughput instruments. The test programs are written in F-15 Adapted PLACE ATLAS (FAPA), which the offline compiler converts into assembly language then machine code for the legacy computer. Aspects of the test programs are timing critical, so an approach using indeterminate software emulation of the legacy computer was not completely compatible with the existing TPSs due to instabilities. The original AIS instruments were largely custom designed for military usage before commercial instruments with extended operating ranges were available. These legacy instruments preceded many of the modern standard building block performance envelopes, so unusual features required innovative modern instrument selections. This paper describes the Boeing determinate hardware based design approach which preserves the legacy computer timing. Modern instrument selection examples to match legacy instrument performance are discussed as space permits.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131620935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Considerations when migrating from traditional instrumentation to PXI instrumentation","authors":"D. Lamont, A. Kruger","doi":"10.1109/AUTEST.2012.6334581","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334581","url":null,"abstract":"This document will address primary considerations when migrating from traditional box instrumentation to the modular approach of PXI instrumentation and the importance that software has in the process.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"509 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114299064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Arithmetic compaction circuits for mixed-signal systems testing","authors":"V. Geurkov, L. Kirischian","doi":"10.1109/AUTEST.2012.6334550","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334550","url":null,"abstract":"Arithmetic error-control codes (ECCs) have been designed to protect the integrity of data being transmitted and/or processed. The implementation of an ECC involves constructing an appropriate encoding/decoding device. An important part of this device is a residue computing circuit (RCC). This circuit has also been used in mixed-signal systems testing and is referred to as a compaction circuit. As ECCs originated primarily to protect data transfers over binary channels, the design methodology for RCCs has been mostly oriented toward a binary case. A non-binary design technique has only been reported for a special type of compaction modulus. In this work, we consider a design technique for a multiple-bit arithmetic compaction circuit with an arbitrary compaction modulus. It is assumed that the codes being compacted are fuzzy, which distorts the result of compaction and increases the aliasing rate. Even though the fault free system's output code distortion is small, the compaction circuit may aggravate it beyond the acceptable levels making the method impractical. We design a low cost compactor that does not increase the code distortion. The circuit can be used for off-line and on-line mixed-signal systems testing, as well as fault-tolerant data processing and noise-tolerant data transmission.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"271 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125046563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A commercial approach to military system sustainment","authors":"P. F. Burrus, R. Jones, C. Lew","doi":"10.1109/AUTEST.2012.6334535","DOIUrl":"https://doi.org/10.1109/AUTEST.2012.6334535","url":null,"abstract":"The US Department of Defense (DoD) has utilized commercially-built military systems designed with Commercial-Off-The-Shelf (COTS) hardware and software in an attempt to cut costs. Supporting and maintaining these commercial systems need to have a different approach than the existing maintenance concepts for the proprietary military systems. In this paper we will look at a streamlined process on DoD C-17 Automated Test Equipment (CATE) using a commercial approach to support and maintain them. Test equipment obsolescence is a serious problem in DoD ATE systems today, especially with a commercial system. The CATE is a commercial system integrated with COTS software and hardware. In its brief lifetime of approximately 10 years the CATE in particular averages an obsolescence of two and a half COTS hardware or Tester Replaceable Units (TRUs) every three years. The lifespan support on the CATE COTS software averages just less than two years. As the TRUs and software become obsolete and unsupportable a streamlined process is necessary and critical in finding and qualifying alternate TRUs and software. This streamlined process needs to reduce the total life-cycle costs of maintenance support while maintaining the current availability of the deployed fleet of CATEs and the continued seamlessly uninterrupted support of the Test Program Sets (TPSs) that run on them.","PeriodicalId":142978,"journal":{"name":"2012 IEEE AUTOTESTCON Proceedings","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125344852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}