2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)最新文献_第9页

ICCAD-2017 CAD contest in net open location finder with obstacles: Invited paper ICCAD-2017网开寻位器障碍CAD竞赛:征文

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203869

Kai-Shun Hu, Ming Yang, Yu-Hui Huang, Bing-Yi Wong, Cindy Chin-Fang Shen

引用次数: 9

A hybrid approach to cache management in heterogeneous CPU-FPGA platforms 异构CPU-FPGA平台中缓存管理的混合方法

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203881

Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang

{"title":"A hybrid approach to cache management in heterogeneous CPU-FPGA platforms","authors":"Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang","doi":"10.1109/ICCAD.2017.8203881","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203881","url":null,"abstract":"Heterogenous computing is gaining increasing attention due to its promise of high performance with low power. Shared coherent cache based CPU-FPGA platforms, like Intel HARP, are a particularly promising example of such systems with enhanced efficiency and high flexibility. In this work, we propose a hybrid strategy that relies on both static analysis of applications and dynamic control of cache based on static analysis to minimize the contention on the FPGA cache in the emerging CPU-FPGA platforms with shared coherent caches. In the static analysis, we analyze memory access patterns of the accelerated kernels on FPGA using reuse distance theory and generate kernel characteristics called Key values. Thereafter, a dynamic scheme for cache bypassing and partitioning control based on these Key values is developed to increase the cache hit rate and improve the performance. We validate our proposed strategy using a system-level architectural simulator for CPU-FPGA heterogeneous computing systems. Experiments show that the proposed strategy can increase the cache hit rate by 22.90% on average and speed up the application by up to 12.52% with negligible area overhead.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124121370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Energy-efficient and robust 3D NoCs with contactless vertical links (Invited paper) 具有非接触式垂直链接的节能耐用3D noc(特邀论文)

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8501894

Sourav Das, S. Gopal, D. Heo, P. Pande

引用次数: 3

IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options 具有不同设备和单元高度选项的N5节点的设计和技术协同优化

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203764

L. Mattii, D. Milojevic, P. Debacker, Y. Sherazi, Mladen Berekovic, P. Raghavan

{"title":"IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options","authors":"L. Mattii, D. Milojevic, P. Debacker, Y. Sherazi, Mladen Berekovic, P. Raghavan","doi":"10.1109/ICCAD.2017.8203764","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203764","url":null,"abstract":"In this paper we propose a novel Design-Technology Co-Optimization (DTCO) framework that enables PDK generation and design implementation of sub-10nm technology nodes. The framework allows to study the impact of different technology options at design level and use effective design Power, Performance and Area (PPA) to decide on right technology option. Design implementation flow is IR-drop aware, allowing integration of optimized Power Delivery Network (PDN) for different device/cell options. Using N5-like technology node assumptions (contacted poly and metallization pitch of 42 and 32nm), we generate digital PDKs for different device (finFET, 2 & 3 nanowires) and standard cell options (3, 2 or 1 fins & 7.5 or 6-Tracks cell height). Different PDKs have been used to implement and characterize a wire dominated circuit. Our study shows that the design PDN/IR-drop awareness is fundamental to complete DTCO approach for sub-10nm nodes. Using our dedicated design methodology we reach the IR-drop target of 2.5% VDD (on the lowest metal layers), while minimizing the area degradation induced by the PDN. Further, we demonstrate that such optimized PDN is mandatory to enable the 20% area gain when moving from 7.5 to 6-Tracks cell height. Finally, we show that the impact of different device options is in range of 15% Power, 2X Performance and 20% Area, further validating the need of a fully integrated DTCO.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117120717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

ASAP7 predictive design kit development and cell design technology co-optimization: Invited paper ASAP7预测设计套件开发与电池设计技术协同优化:特邀论文

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203889

V. Vashishtha, Manoj Vangala, L. Clark

引用次数: 32

Offshore oil spill monitoring and detection: Improving risk management for offshore petroleum cyber-physical systems: (Invited paper) 海上溢油监测与检测:改进海上石油信息物理系统的风险管理:(特邀论文)

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203865

Xiaodao Chen, Dongmei Zhang, Yuewei Wang, Lizhe Wang, Albert Y. Zomaya, Shiyan Hu

引用次数: 7

PRESCOTT: Preset-based cross-point architecture for spin-orbit-torque magnetic random access memory PRESCOTT:自旋轨道转矩磁随机存取存储器的基于预设的交叉点结构

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203785

Liang Chang, Zhaohao Wang, A. O. Glova, Jishen Zhao, Youguang Zhang, Yuan Xie, Weisheng Zhao

{"title":"PRESCOTT: Preset-based cross-point architecture for spin-orbit-torque magnetic random access memory","authors":"Liang Chang, Zhaohao Wang, A. O. Glova, Jishen Zhao, Youguang Zhang, Yuan Xie, Weisheng Zhao","doi":"10.1109/ICCAD.2017.8203785","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203785","url":null,"abstract":"Due to nearly zero leakage power consumption, non-volatile magnetoresistive random access memory (MRAM) is becoming one of the promising candidates for replacing conventional volatile memories (e.g. SRAM and DRAM). In particular, emerging spin-orbit torque (SOT) MRAM is considered to outperform spin-transfer torque (STT) MRAM due to its fast switching, separate read/write paths, and lower energy dissipation. However, the SOT-MRAM technology is still in its infancy; one key design challenge is that the control of SOT-MRAM, which involves three terminals, is more complicated compared with STT-MRAM. In this paper, we propose a novel MRAM write scheme called PRESCOTT1, where the “1” and “0” data values can be written into memory cells through the SOT and STT, respectively. As a result, the write current is unidirectional rather than bi-directional, which addresses the control complexity. Using this unidirectional write scheme, we design a PreSET-based cross-point (CP) MRAM to improve programing speed, write energy dissipation and storage density compared to conventional MRAM. Circuit simulation results demonstrate that our PreSET-based CP MRAM can achieve around 67.14% average write energy reduction and 50.86% improvement in programming speed, compared with CP STT-MRAM.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116732280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Timing and security analysis of VANET-based intelligent transportation systems: (Invited paper) 基于vanet的智能交通系统时序与安全性分析:(特邀论文)

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203888

Bowen Zheng, M. O. Sayin, Chung-Wei Lin, Shin'ichi Shiraishi, Qi Zhu

{"title":"Timing and security analysis of VANET-based intelligent transportation systems: (Invited paper)","authors":"Bowen Zheng, M. O. Sayin, Chung-Wei Lin, Shin'ichi Shiraishi, Qi Zhu","doi":"10.1109/ICCAD.2017.8203888","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203888","url":null,"abstract":"With the fast development of autonomous driving and vehicular communication technologies, intelligent transportation systems that are based on VANET (Vehicular Ad-Hoc Network) have shown great promise. For instance, through V2V (Vehicle-to-Vehicle) and V2I (Vehicle-to-Infrastructure) communication, intelligent intersections allow more fine-grained control of vehicle crossings and significantly enhance traffic efficiency. However, the performance and safety of these VANET-based systems could be seriously impaired by communication delays and packet losses, which may be caused by network congestion or by malicious attacks that target communication timing behavior. In this paper, we quantitatively model and analyze some of the timing and security issues in transportation networks with VANET-based intelligent intersections. In particular, we demonstrate how communication delays may affect the performance and safety of a single intersection and of multiple interconnected intersections, and present our delay-tolerant intersection management protocols. We also discuss the issues of such protocols when the vehicles are non-cooperative and how they may be addressed with game theory.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121751927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

Standard cell library design and optimization methodology for ASAP7 PDK: (Invited paper) ASAP7 PDK标准单元库设计与优化方法:(特邀论文)

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203890

Xiaoqing Xu, Nishi Shah, A. Evans, S. Sinha, B. Cline, G. Yeric

引用次数: 34

ACE: Adaptive channel estimation for detecting analog/RF trojans in WLAN transceivers 自适应信道估计检测模拟/射频木马在WLAN收发器

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-01 DOI: 10.1109/ICCAD.2017.8203848

K. S. Subramani, A. Antonopoulos, A. Abotabl, Aria Nosratinia, Y. Makris

{"title":"ACE: Adaptive channel estimation for detecting analog/RF trojans in WLAN transceivers","authors":"K. S. Subramani, A. Antonopoulos, A. Abotabl, Aria Nosratinia, Y. Makris","doi":"10.1109/ICCAD.2017.8203848","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203848","url":null,"abstract":"We propose a defense method capable of detecting hardware Trojans (HTs) in the analog/RF circuitry of wireless local area network (WLAN) transceivers. The proposed method, which is implemented on the receiver (RX) side and cannot be tampered with by the attacker, leverages the channel estimation capabilities present in Orthogonal Frequency Division Multiplexing (OFDM) systems. Specifically, it employs an adaptive approach to robustly isolate possible HT activity from channel and device noise, thereby exposing the Trojan's presence. The adaptive channel estimation (ACE) defense mechanism is put to the test using a HT which is implemented on a printed circuit board (PCB) and mounted on the Wireless Open-Access Research Platform (WARP). This HT, which is introduced through minute modifications in the power amplifier (PA), manipulates the transmission power characteristics of an 802.11a/g transmitter (TX) in order to leak sensitive data, such as the encryption key. Effectiveness of the proposed defense has been verified through experiments conducted in actual channel conditions, namely over-the-air and in the presence of interference.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132726763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13