Vivek Karthick Perumal, Sivaranjani Sundaralingam, Mohammed Naveeth Jafarali, T. Krishnan
{"title":"Protection of FPGA IP core using lock and unlock mechanism","authors":"Vivek Karthick Perumal, Sivaranjani Sundaralingam, Mohammed Naveeth Jafarali, T. Krishnan","doi":"10.1063/5.0110027","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":58197,"journal":{"name":"机电信息","volume":"1958 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"机电信息","FirstCategoryId":"96","ListUrlMain":"https://doi.org/10.1063/5.0110027","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
京公网安备 11010802042870号
求助内容：
应助结果提醒方式：
