VLSI design techniques for low power MAC unit: A review

A. Sahu, Rashmi Samanth, T. Mendez, S. G. Nayak, K. V. Kedlaya
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引用次数: 0

Abstract

MAC Unit is the basic building block of any signal processing hardware. At present, every field, such as medicine, astronomy, geography, industry, embedded system, etc requires applications of digital image processing. These fields require real-time processing, and efficiency is necessary in the implementation of digital image processing. Multiplier –and Accumulator (MAC) Units perform the mathematical operation such as convolution. They are the fundamental digital block and are the most computationally and resource-demanding unit. A MAC unit with optimum performance and power consumption is always desired. The primary contribution of this paper is investigating the existing work and techniques used by several authors to minimize the power consumption in the design of MAC Unit. This review can provide aninsight to the beginners in the VLSI Arithmetic Circuit Design to gain more idea on Low power MAC Unit Design.
低功耗MAC单元的VLSI设计技术综述
MAC单元是任何信号处理硬件的基本组成部分。目前,医学、天文、地理、工业、嵌入式系统等各个领域都需要数字图像处理的应用。这些领域需要实时处理,在数字图像处理的实施中,效率是必要的。乘数和累加器(MAC)单元执行数学运算,如卷积。它们是基本的数字块,是最需要计算和资源的单位。一个具有最佳性能和功耗的MAC单元总是需要的。本文的主要贡献是研究了几位作者在设计MAC单元时所使用的最小化功耗的现有工作和技术。这篇综述可以为VLSI算术电路设计的初学者提供一些见解,使他们对低功耗MAC单元的设计有更多的了解。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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