A high speed wide band low phase noise multi-mode frequency divider for DRM/DAB/AM/FM frequency synthesizer

Abstract

The implementation of a high-speed wide band low phase noise multi-mode frequency divider (MMFD) for a DRM/DAB frequency synthesizer is described. According to the characteristics of each part, novel SCL and CMOS static flip-flop DFF are applied. Realized in a 0.18-µm RF CMOS technology, the core area of the MMFD is 745 µm×705 µm, including buffer and pads. Post simulated results show that its operation frequency ranging is from 2.2GHz to 3.1 GHz, and phase noise of the MMFD is •134dBc/Hz at 10 kHz offset. The maximum core power consumption is 24.6 mA at a 1.8V power supply.