Improving EtherCAT master-slave synchronization precision using PTCP embedded in EtherCAT frames: A proof-of-concept

Abstract

Designed for efficient real time traffic at low cycle times, EtherCAT is known to display several inefficiencies which include high quality master-slave synchronization. In this paper we examine a prototype circuit that allows us to achieve high quality time synchronization between master and slave device using PTCP embedded in EtherCAT frames. This circuit is backward compatible to existing EtherCAT networks. We provide measurement data and make proposals for future work.