Experimental analysis of NBTI effects on QDI circuits with resistive bridging faults

Abstract

Detecting defects in Delay-Insensitive Circuits (DIC), particularly for clockless asynchronous circuits, poses a major challenge. Traditional testing methods are complex and result in significant overhead. The robustness of asynchronous circuits is crucial for ensuring the safety and reliability of critical systems, as undetected defects can compromise their operation. To address these challenges, our method leverages the unique voltage signatures of asynchronous circuits to identify resistive defects. Through our FPGA experiments, we demonstrated the circuits' ability to generate informative voltage signatures, thereby facilitating the detection of these defects. Additionally, we performed a combined analysis of resistive defect detection and the impact of aging caused by Negative-Bias Temperature Instability (NBTI) on Quasi Delay Insensitive (QDI) circuits. This analysis highlights how defects can evade manufacturing tests and evolve into dynamic faults over time. Our results provide a precise evaluation of this impact and propose a comprehensive approach to assess circuit robustness under realistic operating conditions.