A hybrid memory polynomial digital predistortion model for RF transmitters

IF 2.2 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2024-09-24 DOI:10.1016/j.vlsi.2024.102285

Jijun Ren, Ziyang Xu, Xing Wang

引用次数: 0

Abstract

The power amplifier (PA), a key component of the transmitter system, operates near the saturation region, resulting in nonlinear distortion of the output signal, which affects the quality of the transmitter system. For this, a series of linearization techniques are used to compensate for distortion, one of the most effective and widely applied is the digital predistortion (DPD) technique. The traditional DPD models can be categorized into a single model or multiple models cascade or parallel. In this letter, a hybrid memory polynomial (HMP) model is proposed to further enhance the accuracy of the model, which is composed of multiple memory polynomial (MP) models by cascading and parallelizing. The experimental results show that the HMP model has better accuracy than the traditional MP model at the same complexity.

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射频发射机的混合记忆多项式数字预失真模型

功率放大器（PA）是发射机系统的关键部件，其工作状态接近饱和区，导致输出信号非线性失真，从而影响发射机系统的质量。为此，人们采用了一系列线性化技术来补偿失真，其中最有效、应用最广泛的是数字预失真（DPD）技术。传统的 DPD 模型可分为单一模型或多个模型级联或并联。为了进一步提高模型的精度，本文提出了一种混合存储多项式（HMP）模型，该模型由多个存储多项式（MP）模型通过级联和并行的方式组成。实验结果表明，在相同复杂度下，HMP 模型比传统 MP 模型具有更高的精度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.