A fast hardware accelerator for nighttime fog removal based on image fusion

IF 2.2 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2024-08-08 DOI:10.1016/j.vlsi.2024.102256

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引用次数: 0

Abstract

In this paper, a fast hardware accelerator for defogging based on image fusion is proposed. This method overcomes the problem of model based defogging algorithms being unable to estimate atmospheric light in dark scenes, as well as the poor performance of learning based defogging algorithms at night. Through hardware implementation and optimization, while reducing system resources, it can meet the demand for real-time defogging. The entire algorithm consists of difference guided filtering, grayscale linear stretching, and image fusion. The difference oriented filtering algorithm can enhance edges by obtaining image information of bright and dark channels, and has better effects on night lighting. Gray-scale linear stretching can restore the overall brightness and edge information of the image, compensating for some halos and noise caused by difference guided filtering. Numerous experiments have shown that the proposed hardware accelerator for defogging performs best at night. It can also be used effectively during the day. In addition, it has the fastest processing speed, which can process the images with the size of 1920*1080 for 34.5fps in real time.

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基于图像融合的夜间除雾快速硬件加速器

本文提出了一种基于图像融合的快速除雾硬件加速器。该方法克服了基于模型的除雾算法在黑暗场景中无法估计大气光的问题，以及基于学习的除雾算法在夜间性能不佳的问题。通过硬件实现和优化，在减少系统资源的同时，可以满足实时除雾的需求。整个算法包括差分导向滤波、灰度线性拉伸和图像融合。其中，差分导向滤波算法通过获取明暗通道的图像信息来增强边缘，在夜间照明情况下效果更佳。灰度线性拉伸可以还原图像的整体亮度和边缘信息，弥补差分导向滤波造成的一些光晕和噪点。大量实验表明，所提出的用于除雾的硬件加速器在夜间表现最佳。它在白天也能有效使用。此外，它还具有最快的处理速度，能以 34.5fps 的速度实时处理尺寸为 1920*1080 的图像。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.

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