Moore on Chip Scaling: Scaling Compute to Satiate AI's Appetite Will Take Extreme Measures

IF 2.6 4区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Spectrum Pub Date : 2024-07-09 DOI:10.1109/MSPEC.2024.10589680

Harry Goldstein

引用次数: 0

Abstract

Fifty years ago, DRAM inventor and IEEE Medal of Honor recipient Robert Dennard created what essentially became the semiconductor industry's path to perpetually increasing transistor density and chip performance. That path became known as Dennard scaling, and it helped codify Gordon Moore's postulate about device dimensions shrinking by half every 18 to 24 months. For decades it compelled engineers to push the physical limits of semiconductor devices.

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芯片上的摩尔扩展：扩大计算规模以满足人工智能的胃口需要采取极端措施

五十年前，DRAM 发明者、IEEE 荣誉奖章获得者罗伯特-邓纳（Robert Dennard）开创了半导体行业不断提高晶体管密度和芯片性能的道路。这条道路被称为 "邓纳缩放"，它帮助戈登-摩尔（Gordon Moore）实现了器件尺寸每 18 到 24 个月缩小一半的假设。几十年来，它迫使工程师们不断挑战半导体器件的物理极限。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Spectrum 工程技术-工程：电子与电气

CiteScore

2.50

自引率

0.00%

发文量

254

审稿时长

4-8 weeks

期刊介绍： IEEE Spectrum Magazine, the flagship publication of the IEEE, explores the development, applications and implications of new technologies. It anticipates trends in engineering, science, and technology, and provides a forum for understanding, discussion and leadership in these areas. IEEE Spectrum is the world''s leading engineering and scientific magazine. Read by over 300,000 engineers worldwide, Spectrum provides international coverage of all technical issues and advances in computers, communications, and electronics. Written in clear, concise language for the non-specialist, Spectrum''s high editorial standards and worldwide resources ensure technical accuracy and state-of-the-art relevance.