Bridge-contact resistance method for precise evaluation of electrical contacts of nano-scale semiconductor devices

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Jiyeong Yun , Byeong-Gyu Park , Huiyun Jung , Jonghyung Lee , Youngjin Park , Geeyoon Kang , Honghwi Park , Hongsik Park
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引用次数: 0

Abstract

Source/drain electrical contact resistance has become a significant parasitic component that should be considered in scaled-down semiconductor devices fabricated with nano-structured channel layers. It is therefore crucial to evaluate the electrical contacts between electrodes and nano-scale thin semiconductor layers precisely. The conventional method for evaluating contacts is based on the transmission-line model (TLM), which extracts the contact parameters (specific contact resistance and transfer length) by assuming that the electrical properties of the semiconductor layer under the electrode are the same as the channel region between the electrodes. However, it is difficult to apply this method directly to modern scaled devices because the electrical properties of ultrathin semiconductor layers under the electrode are altered after metal contact formation. Here, we propose a bridge-contact resistance method that can be used for precise evaluation of the intrinsic contact parameters and the altered sheet resistance under electrodes by accounting for the change in electrical properties of an ultrathin semiconductor layer after contact formation. In this method, the intrinsic electrical contacts are accurately evaluated by analyzing the current distribution through an auxiliary electrically-floated electrode formed on the channel between the two contact electrodes. The effectiveness of the proposed characterization method was verified by evaluating electrical contacts on an ultrathin silicon layer (12 nm thickness). The results indicated that the specific contact resistance and transfer length were extracted to be approximately 20 % lower than those obtained using the conventional TLM method, which was due to the increased sheet resistance under the electrode after contact formation.

用于精确评估纳米级半导体器件电接触的电桥接触电阻法
源极/漏极电接触电阻已成为使用纳米结构沟道层制造的缩小型半导体器件中需要考虑的重要寄生元件。因此,精确评估电极与纳米级半导体薄层之间的电接触至关重要。评估接触的传统方法基于传输线模型(TLM),该模型通过假设电极下半导体层的电特性与电极间沟道区域的电特性相同来提取接触参数(特定接触电阻和传输长度)。然而,由于电极下超薄半导体层的电特性在金属接触形成后会发生改变,因此很难将这种方法直接应用于现代比例器件。在此,我们提出了一种桥接-接触电阻法,通过考虑接触形成后超薄半导体层电学特性的变化,该方法可用于精确评估电极下的固有接触参数和改变的薄层电阻。在这种方法中,通过分析在两个接触电极之间的通道上形成的辅助电浮电极的电流分布,可以精确评估本征电接触。通过评估超薄硅层(厚度为 12 nm)上的电接触,验证了所提出的表征方法的有效性。结果表明,提取出的特定接触电阻和传输长度比使用传统 TLM 方法获得的结果低约 20%,这是由于接触形成后电极下的薄片电阻增加所致。
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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