A CNN Hardware Accelerator Using Triangle-based Convolution

IF 2.1 4区计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

ACM Journal on Emerging Technologies in Computing Systems Pub Date : 2022-10-13 DOI:https://dl.acm.org/doi/10.1145/3544975

Amal Thomas K, Soumyajit Poddar, Hemanta Kumar Mondal

引用次数: 0

Abstract

Convolutional neural networks (CNNs) have gained a massive impression in the fields of computer vision and especially in the embedded applications because of their high accuracy and performance. However, high computational complexity and power consumption due to convolution operations causes a high demand for low-power accelerators. A 3D geometric optimization strategy is proposed to alleviate the area and power requirements of Multiply Accumulate operations prevalent in all spatial CNNs. The proposed technique is generic and may be easily scaled for accelerators performing spatial 2D convolution.

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基于三角卷积的CNN硬件加速器

卷积神经网络(Convolutional neural networks, cnn)以其优异的精度和性能在计算机视觉领域，尤其是嵌入式应用中获得了广泛的关注。然而，由于卷积运算的高计算复杂度和高功耗导致对低功耗加速器的高需求。提出了一种三维几何优化策略，以缓解空间cnn中普遍存在的乘法累加运算对面积和功率的需求。所提出的技术是通用的，可以很容易地扩展到执行空间二维卷积的加速器。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ACM Journal on Emerging Technologies in Computing Systems 工程技术-工程：电子与电气

CiteScore

4.80

自引率

4.50%

发文量

审稿时长

3 months

期刊介绍： The Journal of Emerging Technologies in Computing Systems invites submissions of original technical papers describing research and development in emerging technologies in computing systems. Major economic and technical challenges are expected to impede the continued scaling of semiconductor devices. This has resulted in the search for alternate mechanical, biological/biochemical, nanoscale electronic, asynchronous and quantum computing and sensor technologies. As the underlying nanotechnologies continue to evolve in the labs of chemists, physicists, and biologists, it has become imperative for computer scientists and engineers to translate the potential of the basic building blocks (analogous to the transistor) emerging from these labs into information systems. Their design will face multiple challenges ranging from the inherent (un)reliability due to the self-assembly nature of the fabrication processes for nanotechnologies, from the complexity due to the sheer volume of nanodevices that will have to be integrated for complex functionality, and from the need to integrate these new nanotechnologies with silicon devices in the same system. The journal provides comprehensive coverage of innovative work in the specification, design analysis, simulation, verification, testing, and evaluation of computing systems constructed out of emerging technologies and advanced semiconductors