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Multi-application Based Fault-Tolerant Network-on-Chip Design for Mesh Topology Using Reconfigurable Architecture

International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI:10.1007/978-981-32-9767-8_37
P. V. Bhanu, P. Kulkarni, Sai Pranavi Avadhanam, J. Soumya, Linga Reddy Cenkeramaddi
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International Symposium on VLSI Design and Test
International Symposium on VLSI Design and Test
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