A novel interface for power-hardware-in-the-loop simulation

Abstract

Power-hardware-in-the-loop (PHIL) simulation is a scenario where a simulation environment virtually exchanges power with real hardware, in contrast to the usual case in hardware-in-the-loop (HIL) simulation, which involves only signal exchange. In this paper, a novel interface for PHIL simulation is proposed and implemented. This new interface addresses some of the stability issues typically present in this kind of application. A complete PHIL experiment is then performed with the new interface, and the experimental results are presented.