A continuous-time /spl Sigma//spl Delta/ modulator with 88dB dynamic range and 1.1MHz signal bandwidth

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI:10.1109/ISSCC.2003.1234208

S. Yan, E. Sánchez-Sinencio

引用次数: 22

Abstract

A baseband continuous-time multi-bit /spl Sigma//spl Delta/ modulator achieves 88dB dynamic range over a 1.1MHz signal bandwidth consuming 62mW from a 3.3V supply. Excess loop delay encountered in conventional continuous-time modulators is eliminated by the proposed architecture. Clock-jitter sensitivity is considerably reduced compared with prior designs.

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连续时间/spl Sigma//spl Delta/调制器，动态范围为88dB，信号带宽为1.1MHz

基带连续时间多位/spl Sigma//spl Delta/调制器在1.1MHz信号带宽下实现88dB动态范围，从3.3V电源消耗62mW。该结构消除了传统连续时间调制器中遇到的过量环路延迟。与以前的设计相比，时钟抖动灵敏度大大降低。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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